SBOS382H may   2008  – june 2023 OPA2673

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Family Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Full Bias and Offline Mode VS = ±6 V
    6. 7.6  Electrical Characteristics: 75% Bias Mode VS = ±6 V
    7. 7.7  Electrical Characteristics: 50% Bias Mode VS = ±6 V
    8. 7.8  Typical Characteristics: VS = ±6 V, Full Bias
    9. 7.9  Typical Characteristics: VS = ±6 V Differential, Full Bias
    10. 7.10 Typical Characteristics: VS = ±6 V, 75% Bias
    11. 7.11 Typical Characteristics: VS = ±6 V, 50% Bias
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Suggestions
        1. 8.3.1.1 Setting Resistor Values to Optimize Bandwidth
        2. 8.3.1.2 Output Current and Voltage
        3. 8.3.1.3 Driving Capacitive Loads
        4. 8.3.1.4 Line Driver Headroom Model
        5. 8.3.1.5 Noise Performance
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 High-Speed Active Filter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 PLC Line Driver
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Thermal Analysis
      2. 9.3.2 Input and ESD Protection
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 TINA-TI™ Simulation Software (Free Download)
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.8 Typical Characteristics: VS = ±6 V, Full Bias

At TA = +25°C, G = +4 V/V, RF = 402 Ω, and RL = 100 Ω, unless otherwise specified.

GUID-20211008-SS0I-STPH-Q8SD-HL6CKB6ZMW4R-low.svg
VO = 500 mVPP
Figure 7-1 Small-Signal Frequency Response
GUID-20211021-SS0I-GPJ7-RLVC-QRNPWNXRSCVC-low.svg
Figure 7-3 Large-Signal Frequency Response
GUID-20211021-SS0I-7RQ1-ZWDS-ZT8RQDDMCTXH-low.gif
75% Bias Mode
Figure 7-5 Small-Signal and Large-Signal Pulse Responses
GUID-20211021-SS0I-W9B6-1J0Q-CKBKW1XXRJGF-low.svg
Figure 7-7 Overdrive Recovery
GUID-20211021-SS0I-QDDG-PXM0-LK2SNM3D41GL-low.svg
VO = 2 VPP
Figure 7-9 Harmonic Distortion vs Frequency
GUID-20211021-SS0I-SCNH-X3MR-TM5CCLXMDCRR-low.svg
VO = 2 VPP, f = 20 MHz
Figure 7-11 Harmonic Distortion vs Load Resistance
GUID-20211022-SS0I-DZHZ-X1ST-0MLCDCDJKLN8-low.svg
VO = 2 VPP, f = 20 MHz
Figure 7-13 Harmonic Distortion vs Supply Voltage
GUID-20230418-SS0I-V5RS-P36S-GGL73JTQC0TT-low.svg
Figure 7-15 Open-Loop Transimpedance Gain and Phase
GUID-20211029-SS0I-HGVJ-WNK2-FVNCVJLD6RTF-low.svg
Figure 7-17 Closed-Loop Output Impedance vs Frequency
GUID-20211022-SS0I-BVBP-VH7L-DLF4GG630MHP-low.gif
Figure 7-19 Typical DC Drift Over Temperature
GUID-20211022-SS0I-KVJF-V1KX-WQS9CBV2G75Q-low.svg
Figure 7-21 Supply Current vs Supply Voltage
GUID-20211021-SS0I-ZKT6-SFDC-97MJZMPB6NDN-low.svg
VO = 500 mVPP
Figure 7-2 Small-Signal Frequency Response Over Power Settings
GUID-20211021-SS0I-BTXP-QNSF-TXPQQS8LW8CV-low.svg
Full Bias Mode
Figure 7-4 Small-Signal and Large-Signal Pulse Responses
GUID-20211021-SS0I-MJCB-4FGD-449WWGD4QQJ4-low.svg
50% Bias Mode
Figure 7-6 Small-Signal and Large-Signal Pulse Responses
GUID-20211021-SS0I-T67Z-43NG-GRBNSRQSHQQ4-low.svg
Input-Referred
Figure 7-8 Channel-to-Channel Crosstalk
GUID-20211021-SS0I-P15G-TF46-MBBSFJZMZ0QS-low.svg
f = 20 MHz
Figure 7-10 Harmonic Distortion vs Output Voltage
GUID-20211021-SS0I-QSCN-GD9L-MDTPVL9F8RWG-low.svg
VO = 2 VPP, f = 20 MHz
Figure 7-12 Harmonic Distortion vs Noninverting Gain
GUID-20211108-SS0I-4W0W-MWQX-L8GBHTDQLTHC-low.svg
Figure 7-14 CMRR and PSRR vs Frequency
GUID-20211021-SS0I-5CKK-7HD2-WSVT95SKL7PN-low.svg
Figure 7-16 Input Voltage and Current Noise Density
GUID-20211029-SS0I-Q8X7-FFRJ-ZKXBNQ1DVGPL-low.svg
Single-Ended
Figure 7-18 Active Off-Line Impedance vs Frequency
GUID-20211027-SS0I-9BFH-TG2N-CT723ZWGZF3S-low.svg
Figure 7-20 Full Bias Mode to Offline Mode Transition Time
GUID-20211022-SS0I-D5RB-VLT8-FDVFXMP63ZQ6-low.svg
Figure 7-22 Supply Current vs Temperature