SBOS079C March   1999  – February 2023 OPA2277 , OPA277 , OPA4277

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA277
    5. 6.5 Thermal Information: OPA2277
    6. 6.6 Thermal Information: OPA4277
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Offset Voltage Adjustment
      3. 7.3.3 Input Protection
      4. 7.3.4 Input Bias Current Cancellation
      5. 7.3.5 EMI Rejection Ratio (EMIRR)
        1. 7.3.5.1 EMIRR IN+ Test Configuration
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Second-Order, Low-Pass Filter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Load Cell Amplifier
      3. 8.2.3 Thermocouple Low-Offset, Low-Drift Loop Measurement With Diode Cold Junction Compensation
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 DRM Package (8-Pin VSON)
      2. 8.4.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 DIP-Adapter-EVM
        4. 9.1.1.4 DIYAMP-EVM
        5. 9.1.1.5 TI Reference Designs
        6. 9.1.1.6 Filter Design Tool
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DRM|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.

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Figure 6-1 Open-Loop Gain and Phase vs Frequency
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Figure 6-3 Input Noise and Current Noise Spectral Density vs Frequency
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Figure 6-5 Channel Separation vs Frequency
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Figure 6-7 Offset Voltage Production Distribution
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Figure 6-9 Warm-Up Offset Voltage Drift
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Figure 6-11 Input Bias Current vs Temperature
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Figure 6-13 Change in Input Bias Current vs Power-Supply Voltage
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Figure 6-15 Quiescent Current vs Supply Voltage
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Figure 6-17 Maximum Output Voltage vs Frequency
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Figure 6-19 Small-Signal Overshoot vs Load Capacitance
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G = 1, CL = 0, VS = ±15 V
Figure 6-21 Small-Signal Step Response
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VS = ±15 V
Figure 6-23 Open-Loop Output Impedance
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Figure 6-2 Power Supply and Common-Mode Rejection vs Frequency
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Figure 6-4 Input Noise Voltage vs Time
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Figure 6-6 Total Harmonic Distortion + Noise vs Frequency
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Figure 6-8 Offset Voltage Drift Production Distribution
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Figure 6-10 AOL, CMR, PSR vs Temperature
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Figure 6-12 Quiescent Current and Short-Circuit Current vs Temperature
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Figure 6-14 Change in Input Bias Current vs Common-Mode Voltage
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Figure 6-16 Settling Time vs Closed-Loop Gain
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Figure 6-18 Output Voltage Swing vs Output Current
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G = 1, CL = 1500 pF, VS = ±15 V
Figure 6-20 Large-Signal Step Response
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G = 1, CL = 1500 pF, VS = ±15 V
Figure 6-22 Small-Signal Step Response