At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
Figure 6-1 Open-Loop Gain and Phase vs Frequency Figure 6-3 Input
Noise and Current Noise Spectral Density vs Frequency Figure 6-5 Channel Separation vs Frequency Figure 6-7 Offset Voltage Production Distribution Figure 6-9 Warm-Up Offset Voltage Drift Figure 6-11 Input
Bias Current vs Temperature Figure 6-13 Change in Input Bias Current vs Power-Supply Voltage Figure 6-15 Quiescent Current vs Supply Voltage Figure 6-17 Maximum Output Voltage vs Frequency Figure 6-19 Small-Signal Overshoot vs Load Capacitance G = 1, CL = 0, VS =
±15 V |
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Figure 6-21 Small-Signal Step
ResponseFigure 6-23 Open-Loop Output
Impedance Figure 6-2 Power
Supply and Common-Mode Rejection vs Frequency Figure 6-4 Input Noise Voltage vs Time Figure 6-6 Total Harmonic Distortion + Noise vs Frequency Figure 6-8 Offset Voltage Drift Production Distribution Figure 6-10 AOL, CMR, PSR vs Temperature Figure 6-12 Quiescent Current and Short-Circuit Current vs Temperature Figure 6-14 Change in Input Bias Current vs Common-Mode Voltage Figure 6-16 Settling Time vs Closed-Loop Gain Figure 6-18 Output Voltage Swing vs Output Current G = 1, CL = 1500 pF,
VS = ±15 V |
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Figure 6-20 Large-Signal Step
ResponseG = 1, CL = 1500 pF,
VS = ±15 V |
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Figure 6-22 Small-Signal Step
Response