9 Revision History
Changes from Revision E (January 2024) to Revision F (March 2024)
- Changed the maximum PSRR (5V to 40V) for OPA2992SIRUGR from 1.3µV/V to
3.7µV/VGo
Changes from Revision D (August 2022) to Revision E (January 2024)
- Removed Preview comments for X2QFN (10)
package.Go
Changes from Revision C (March 2022) to Revision D (August 2022)
- Added X2QFN (10) to Description with preview
statusGo
- Added X2QFN (RUG) package to Pin Configuration and Functions
with preview statusGo
Changes from Revision B (December 2021) to Revision C (March 2022)
- Adjusted the typical CMRR value for VS = 2.7 – 40 V, (V+) – 1 < VCM < V+ (NMOS pair) from "90 dB" to "79 dB" in the Electrical Characteristics sectionGo
- Adjusted the AOL test condition from "VS = 40 V, VCM = VS / 2, (V–) + 0.1 V < VO < (V+) – 0.1 V" to "VS = 40 V, VCM = VS / 2, (V–) + 0.12 V < VO < (V+) – 0.12 V" in the Electrical Characteristics sectionGo
- Adjusted the typical tON Amplifier Enable Time value from "15 µs" to "5 µs" in the Electrical Characteristics sectionGo
- Adjusted the typical SHDN pin input bias current value for VS = 2.7 V to 40 V, (V–) ≤ SHDN ≤ (V–) + 0.7 V from "150 nA" to "400 nA" in the Electrical Characteristics sectionGo
- Removed "Open-Loop Gain and Phase vs Frequency" figure in Typical
Characteristics sectionGo
Changes from Revision A (October 2021) to Revision B (December 2021)
- Added PSRR specification for OPA4992 release in Electrical Characteristics sectionGo
- Added clarification to VS = 2.7 V to 40 V PSRR specification noting that specification is for all channel variantsGo
- Changed y-axis from linear scale to logarithmic scale in "Input Voltage
Noise Spectral Density vs Frequency" figure in Typical Characteristics
sectionGo
- Corrected typo in Shutdown of Feature Description
section from "...specified 10kΩ load to midsupply (VS / 2)" to
"...specified 10kΩ load to V-".Go
Changes from Revision * (June 2021) to Revision A (October 2021)
- Changed the device status from Advance Information to Production
Data
Go