SBOSAI0A December   2023  – May 2024 OPA310-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Voltage
      2. 6.3.2 Rail-to-Rail Input
      3. 6.3.3 Rail-to-Rail Output
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 Overload Recovery
      6. 6.3.6 EMI Rejection
      7. 6.3.7 ESD and Electrical Overstress
      8. 6.3.8 Input ESD Protection
      9. 6.3.9 Shutdown Function
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 OPAx310-Q1 Low-Side, Current Sensing Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4.     Trademarks
    5. 8.4 Electrostatic Discharge Caution
    6. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
  • DBV|6
  • DCK|5
  • DCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

OPA310-Q1 OPA310-Q1 DBV Package5-Pin SOT-23(Top View)Figure 4-1 OPA310-Q1 DBV Package
5-Pin SOT-23
(Top View)
OPA310-Q1 OPA310-Q1 DCK Package5-Pin SC70(Top View)Figure 4-2 OPA310-Q1 DCK Package
5-Pin SC70
(Top View)
Table 4-1 Pin Functions: OPA310-Q1
PIN (1)TYPE DESCRIPTION
NAME SOT-23 SC70
IN– 4 3 I Inverting input
IN+ 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 I Negative (low) supply or ground (for single-supply operation)
V+ 5 5 I Positive (high) supply
(1) I = input, O = output
OPA310-Q1 OPA310S-Q1 DBV Package6-Pin SOT-23(Top View)Figure 4-3 OPA310S-Q1 DBV Package
6-Pin SOT-23
(Top View)
OPA310-Q1 OPA310S-Q1 DCK Package6-Pin SC70(Top View)Figure 4-4 OPA310S-Q1 DCK Package
6-Pin SC70
(Top View)
Table 4-2 Pin Functions: OPA310S-Q1
PIN (1)TYPE DESCRIPTION
NAME SOT-23 SC70
IN– 4 3 I Inverting input
IN+ 3 1 I Noninverting input
OUT 1 4 O Output
SHDN 5 5 I Shutdown: low = amp disabled, high = amp enabled
See Shutdown Function for more information
V– 2 2 I Negative (low) supply or ground (for single-supply operation)
V+ 6 6 I Positive (high) supply
(1) I = input, O = output
OPA310-Q1 OPA2310-Q1 D and DGK Package8-Pin SOIC and VSSOP(Top View)Figure 4-5 OPA2310-Q1 D and DGK Package
8-Pin SOIC and VSSOP
(Top View)
Table 4-3 Pin Functions: OPA2310-Q1
PIN (1)TYPE DESCRIPTION
NAME NO.
IN1– 2 I Inverting input, channel 1
IN1+ 3 I Noninverting input, channel 1
IN2– 6 I Inverting input, channel 2
IN2+ 5 I Noninverting input, channel 2
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
V– 4 I Negative (low) supply or ground (for single-supply operation)
V+ 8 I Positive (high) supply
(1) I = input, O = output
OPA310-Q1 OPA4310-Q1 D and PW Package14-Pin SOIC and TSSOP(Top View)Figure 4-6 OPA4310-Q1 D and PW Package
14-Pin SOIC and TSSOP
(Top View)
Table 4-4 Pin Functions: OPA4310-Q1
PIN (1)TYPE DESCRIPTION
NAME NO.
IN1– 2 I Inverting input, channel 1
IN1+ 3 I Noninverting input, channel 1
IN2– 6 I Inverting input, channel 2
IN2+ 5 I Noninverting input, channel 2
IN3– 9 I Inverting input, channel 3
IN3+ 10 I Noninverting input, channel 3
IN4– 13 I Inverting input, channel 4
IN4+ 12 I Noninverting input, channel 4
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
OUT3 8 O Output, channel 3
OUT4 14 O Output, channel 4
V– 11 I Negative (low) supply or ground (for single-supply operation)
V+ 4 I Positive (high) supply
(1) I = input, O = output