at TA = 25°C, V+ = 2.75V,
V– = –2.75V, RL = 10kΩ connected to VS / 2, VCM =
VS / 2, and VOUT = VS / 2 (unless otherwise
noted)
VS =
5.5V |
VCM =
VS / 2 |
TA =
25°C |
No. of devices = 70 |
Mean = –36µV |
Sigma = 215µV |
Figure 5-1 Offset Voltage Distribution Histogram
VS = 5.5V |
VCM = VS / 2 |
TA = 25°C |
No. of
devices = 140 |
Mean = 0.6pA |
Sigma =
1.2pA |
Figure 5-3 Input
Bias Current Distribution Histogram
VS = 5.5V |
VCM = VS / 2 |
TA = 25°C |
No. of devices =
140 |
Mean = 0.2pA |
Sigma =
1.5pA |
Figure 5-5 Input
Offset Current Distribution Histogram
VS = 5.5V,
VCM = V– |
No. of devices = 72 |
Figure 5-7 Input
Offset Voltage vs Temperature
V+ = 2.75V, V– =
–2.75V |
No. of devices = 72 |
Figure 5-9 Offset Voltage vs Common-Mode
V+ = 2.75V, V– = –2.75V,
VCM > (V+) – 0.6V |
No. of devices = 72 |
Figure 5-11 Offset Voltage vs Common-ModeFigure 5-13 IB vs Temperature
V+ = 2.75V, V– = –2.75V,
VCM = VS/2 |
Figure 5-15 IB vs Common-Mode VoltageFigure 5-17 Open-Loop Gain vs Temperature Figure 5-19 Open-Loop Output Impedance vs Frequency Figure 5-21 Output Voltage Swing vs Output Current (Sourcing) Figure 5-23 Output Voltage Swing vs Output Current (Sourcing) Figure 5-25 PSRR
vs Frequency Figure 5-27 CMRR
vs Frequency Figure 5-29 0.1Hz
to 10Hz Voltage Noise in Time Domain
VS = 5.5V |
VCM = 2.5V |
G = 1 |
BW = 80kHz |
VOUT =
0.5VRMS |
|
Figure 5-31 THD +
N vs Frequency
VS = 5.5V |
VCM = 2.5V |
f = 1kHz |
G = 1 |
BW =
80kHz |
|
Figure 5-33 THD +
N vs AmplitudeFigure 5-35 Quiescent Current vs Supply Voltage Figure 5-37 Quiescent Current vs Temperature Figure 5-39 Small Signal Overshoot vs Capacitive Load Figure 5-41 No
Phase Reversal Figure 5-43 Overload Recovery
G = –1 |
VIN =
10mVPP |
CL = 10pF |
Figure 5-45 Small-Signal Step Response
G = 1 |
VIN = 4VPP |
CL = 10pF |
Figure 5-47 Large-Signal Settling Time (Negative)
G = –1 |
VIN = 4VPP |
CL = 10pF |
Figure 5-49 Large-Signal Step ResponseFigure 5-51 Short-Circuit Current vs Temperature Figure 5-53 Channel Separation
VS = 5.5V |
VCM = VS / 2 |
TA = –40°C to +125°C |
No. of devices = 70 |
Mean = 0.5µV/°C |
Sigma = 0.3µV/°C |
Figure 5-2 Offset Voltage Drift Distribution Histogram
VS = 5.5V |
VCM = VS / 2 |
TA = 85°C |
No. of
devices = 140 |
Mean = 4.6pA |
Sigma =
1.3pA |
Figure 5-4 Input
Bias Current Distribution Histogram
VS = 5.5V |
VCM = VS / 2 |
TA = 85°C |
No. of
devices = 70 |
Mean = 0.3pA |
Sigma =
1.6pA |
Figure 5-6 Input
Offset Current Distribution Histogram
VS = 5.5V,
VCM = V+ |
No. of devices = 72
|
Figure 5-8 Input
Offset Voltage vs Temperature
V+ = 2.75V, V– = –2.75V,
(V–) < VCM < (V+) – 0.6V |
No. of devices = 72 |
Figure 5-10 Offset Voltage vs Common-Mode
VCM = (V–) |
No. of devices = 72 |
Figure 5-12 Offset Voltage vs Supply VoltageFigure 5-14 IOS vs Temperature
V+ = 2.75V, V– = –2.75V,
VCM = VS/2 |
Figure 5-16 IOS vs Common-Mode VoltageFigure 5-18 Open-Loop Gain and Phase vs Frequency Figure 5-20 Closed-Loop Gain vs Frequency Figure 5-22 Output Voltage Swing vs Output Current
(Sinking) Figure 5-24 Output Voltage Swing vs Output Current (Sinking) Figure 5-26 DC
PSRR vs Temperature
VS = 5.5V, (V–)
< VCM < (V+) – 0.6V |
Figure 5-28 DC
CMRR vs TemperatureFigure 5-30 Input
Voltage Noise Spectral Density
VS = 5.5V |
VCM = 2.5V |
G = –1 |
BW = 80kHz |
VOUT =
0.5VRMS |
|
Figure 5-32 THD +
N vs Frequency
VS = 5.5V |
VCM = 2.5V |
f = 1kHz |
G = –1 |
BW =
80kHz |
|
Figure 5-34 THD +
N vs AmplitudeFigure 5-36 Quiescent Current vs Common-Mode Voltage Figure 5-38 Small
Signal Overshoot vs Capacitive Load Figure 5-40 Phase
Margin vs Capacitive Load Figure 5-42 Overload Recovery
G = 1 |
VIN =
10mVPP |
CL = 10pF |
Figure 5-44 Small-Signal Step Response
G = 1 |
VIN = 4VPP |
CL = 10pF |
Figure 5-46 Large-Signal Step Response
G = 1 |
VIN = 4VPP |
CL = 10pF |
Figure 5-48 Large-Signal Settling Time (Positive)Figure 5-50 Maximum Output Voltage vs Frequency Figure 5-52 Electromagnetic Interference Rejection Ratio Referred to Noninverting Input
(EMIRR+) vs Frequency