OPAx316-Q1 10-MHz, Rail-to-Rail Input/Output, Low-Voltage, 1.8-V CMOS Operational Amplifier

7.3.1 Operating Voltage

The OPAx316-Q1 operational amplifiers are fully specified and ensured for operation from 1.8 V to 5.5 V. In addition, many specifications apply from –40°C to +125°C. Parameters that vary significantly with operating voltages or temperature are illustrated in the Typical Characteristics graphs.

7.3.2 Rail-to-Rail Input

The input common-mode voltage range of the OPAx316-Q1 series extends 200 mV beyond the supply rails for supply voltages greater than 2.5 V. This performance is achieved with a complementary input stage: an N-channel input differential pair in parallel with a P-channel differential pair, as shown in the Functional Block Diagram. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.4 V to 200 mV above the positive supply, whereas the P-channel pair is active for inputs from 200 mV below the negative supply to approximately (V+) – 1.4 V. There is a small transition region, typically (V+) – 1.2 V to (V+) – 1 V, in which both pairs are on. This 200-mV transition region can vary up to 200 mV with process variation. Thus, the transition region (both stages on) can range from (V+) – 1.4 V to (V+) – 1.2 V on the low end, up to (V+) – 1 V to (V+) – 0.8 V on the high end. Within this transition region, PSRR, CMRR, offset voltage, offset drift, and THD can degrade compared to device operation outside this region.

7.3.3 Input and ESD Protection

The OPAx316-Q1 incorporates internal ESD protection circuits on all pins. In the case of input and output pins, this protection primarily consists of current-steering diodes connected between the input and power-supply pins. These ESD protection diodes provide in-circuit, input overdrive protection, as long as the current is limited to 10 mA, as stated in Absolute Maximum Ratings table. Figure 37 shows how a series input resistor can be added to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and the value must be kept to a minimum in noise-sensitive applications.

Figure 37. Input Current Protection

7.3.4 Common-Mode Rejection Ratio (CMRR)

CMRR for the OPAx316-Q1 is specified in several ways so the user can select the best match for a given application, as shown in the Electrical Characteristics table. First, the data sheet gives the CMRR of the device in the common-mode range below the transition region [V_CM < (V+) – 1.4 V]. This specification is the best indicator of device capability when the application requires use of one of the differential input pairs. Second, the CMRR over the entire common-mode range is specified at V_CM = –0.2 V to 5.7 V for V_S = 5.5 V. This last value includes the variations shown in Figure 4 through the transition region.

7.3.5 EMI Susceptibility and Input Filtering

Operational amplifiers vary with regard to the susceptibility of the device to electromagnetic interference (EMI). If conducted EMI enters the operational amplifier, the dc offset observed at the amplifier output can shift from the nominal value when EMI is present. This shift is a result of signal rectification associated with the internal semiconductor junctions. Although EMI can affect all operational amplifier pin functions, the signal input pins are likely to be the most susceptible. The OPA316-Q1 operational amplifier family incorporates an internal input low-pass filter that reduces the amplifier response to EMI. This filter provides both common-mode and differential-mode filtering. The filter is designed for a cutoff frequency of approximately 80 MHz (–3 dB), with a roll-off of 20 dB per decade.

TI developed the ability to accurately measure and quantify the immunity of an operational amplifier over a broad frequency spectrum extending from 10 MHz to 6 GHz. The EMI rejection ratio (EMIRR) metric allows operational amplifiers to be directly compared by the EMI immunity. Figure 35 illustrates the testing results on the OPAx316-Q1. For more information, see EMI Rejection Ratio of Operational Amplifiers.

7.3.6 Rail-to-Rail Output

Designed as a low-power, low-noise operational amplifier, the OPAx316-Q1 delivers a robust output drive capability. A class AB output stage with common-source transistors achieves full rail-to-rail output swing capability. For resistive loads of 10-kΩ, the output swings typically to within 30 mV of either supply rail regardless of the power-supply voltage applied. Different load conditions change the ability of the amplifier to swing close to the rails; see Figure 11.

7.3.7 Capacitive Load and Stability

The OPAx316-Q1 is designed for applications where driving a capacitive load is required. As with all operational amplifiers, there may be specific instances where the OPAx316-Q1 can become unstable. The particular operational amplifier circuit configuration, layout, gain, and output loading are some of the factors to consider when establishing whether or not an amplifier is stable in operation. An operational amplifier in the unity-gain
(1 V/V) buffer configuration that drives a capacitive load exhibits a greater tendency to be unstable than an amplifier operated at a higher noise gain. The capacitive load, in conjunction with the operational amplifier output resistance, creates a pole within the feedback loop that degrades the phase margin. The degradation of the phase margin increases as the capacitive loading increases. As a conservative best practice, designing for 25% overshoot (40° phase margin) provides improved stability over process variations. The equivalent series resistance (ESR) of some very-large capacitors (C_L with a value greater than 1 μF) is sufficient to alter the phase characteristics in the feedback loop such that the amplifier remains stable. Increasing the amplifier closed-loop gain allows the amplifier to drive increasingly larger capacitance. This increased capability is evident when observing the overshoot response of the amplifier at higher voltage gains. See Figure 24 (G = –1 V/V) and Figure 25 (G = 1 V/V).

Inserting a small resistor (typically 10-Ω to 20-Ω) can increase the capacitive load capability of the amplifier in a unity-gain configuration, as shown in Figure 38. This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. One possible problem with this technique, however, is that a voltage divider is created with the added series resistor and any resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output that reduces the output swing.

Figure 38. Improving Capacitive Load Drive

7.3.8 Overload Recovery

Overload recovery is defined as the time required for the operational amplifier output to recover from a saturated state to a linear state. The output devices of the operational amplifier enter a saturation region when the output voltage exceeds the rated operating voltage, either because of the high input voltage or the high gain. After the device enters the saturation region, the charge carriers in the output devices require time to return back to the linear state. After the charge carriers return back to the linear state, the device begins to slew at the specified slew rate. Thus, the propagation delay in case of an overload condition is the sum of the overload recovery time and the slew time. The overload recovery time for the OPAx316-Q1 is approximately 300 ns.

8.1.1 General Configurations

When receiving low-level signals, the device often requires limiting the bandwidth of the incoming signals into the system. The simplest way to establish this limited bandwidth is to place an RC filter at the noninverting pin of the amplifier, as Figure 39 shows.

Figure 39. Single-Pole Low-Pass Filter

If even more attenuation is needed, the device requires a multiple-pole filter. The Sallen-Key filter can be used for this task, as Figure 40 shows. For best results, the amplifier must have a bandwidth that is eight to 10 times the filter frequency bandwidth. Failure to follow this guideline can result in phase shift of the amplifier.

Figure 40. Two-Pole, Low-Pass, Sallen-Key Filter

8.2.1 Design Requirements

Table 1 lists the design requirements:

8.2.2 Detailed Design Procedure

The circuit in Figure 41 takes a single-ended input signal (V_IN) and generates two output signals (V_OUT+ and V_OUT–) using two amplifiers and a reference voltage (V_REF). V_OUT+ is the output of the first amplifier and is a buffered version of the input signal (V_IN) , as shown in Equation 1. V_OUT– is the output of the second amplifier that uses V_REF to add an offset voltage to V_IN and feedback to add inverting gain. The transfer function for V_OUT– is given in Equation 2.

Equation 1.

Equation 2.

The differential output signal (V_DIFF) is the difference between the two single-ended output signals (V_OUT+ and V_OUT–). Equation 3 shows the transfer function for V_DIFF. Using conditions in Equation 4 and Equation 5 and applying the conditions that R₁ = R₂ and R₃ = R₄, the transfer function is simplified into Equation 6. Using this configuration, the maximum input signal is equal to the reference voltage, and the maximum output of each amplifier is equal to V_REF. The differential output range is 2 × V_REF. Furthermore, the common-mode voltage is one half of V_REF, as shown in Equation 7.

Equation 3.

Equation 4.

Equation 5.

Equation 6.

Equation 7.

8.2.3 Application Curves

The measured transfer functions in Figure 42, Figure 43, and Figure 44 are generated by sweeping the input voltage from 0.1 V to 2.4 V. The full input range is actually 0 V to 2.5 V, but is restricted to 0.1 V to maintain optimal linearity. For more details on this design and other alternative devices that can be used in place of the OPAx316-Q1, see Single-Ended Input to Differential Output Conversion Circuit Reference Design.

Figure 42. V_OUT+ vs Input Voltage

Figure 44. V_DIFF vs Input Voltage

Figure 43. V_OUT– vs Input Voltage