The OPA320 (single) and OPA2320 (dual) are a new generation of precision, low-voltage CMOS operational amplifiers optimized for very low noise and wide bandwidth while operating on a low quiescent current of only 1.45 mA.
The OPA320 series is ideal for low-power, single-supply applications. Low-noise (7 nV/√Hz) and high-speed operation also make them well-suited for driving sampling analog-to-digital converters (ADCs). Other applications include signal conditioning and sensor amplification.
The OPA320 features a linear input stage with zero-crossover distortion that delivers excellent common-mode rejection ratio (CMRR) of typically 114 dB over the full input range. The input common mode range extends 100 mV beyond the negative and positive supply rails. The output voltage typically swings within 10 mV of the rails.
In addition, the OPAx320 has a wide supply voltage range from 1.8 V to 5.5 V with excellent PSRR
(106 dB) over the entire supply range, making them suitable for precision, low-power applications that run directly from batteries without regulation.
The OPA320 (single version) is available in a 5-pin SOT23 package; the OPA320S shutdown single version is available in an 6-pin SOT23 package. The dual OPA2320 is offered in 8-pin SOIC, VSSOP, and SON packages, and the OPA2320S (dual with shutdown) in a 10-pin VSSOP package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
OPA320 | SOT-23 (5) | 2.90 mm × 1.60 mm |
OPA320S | SOT-23 (6) | 2.90 mm × 1.60 mm |
OPA2320 | VSSOP (8) | 3.00 mm × 3.00 mm |
SOIC (8) | 4.90 mm × 3.91 mm | |
SON (10) | 3.00 mm × 3.00 mm | |
OPA2320S | VSSOP (10) | 3.00 mm × 3.00 mm |
Changes from E Revision (June 2013) to F Revision
Changes from D Revision (November 2011) to E Revision
Changes from C Revision (August 2011) to D Revision
Changes from B Revision (March 2010) to C Revision
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | OPA320 | OPA320S | ||
–IN | 4 | 4 | I | Negative (inverting) input |
+IN | 3 | 3 | I | Positive (noninverting) input |
OUT, VOUT | 1 | 1 | O | Output |
SHDN | — | 5 | I | Shutdown, active low |
V– | 2 | 2 | — | Negative (lowest) power supply |
V+ | 5 | 6 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | SOIC, VSSOP |
SON | ||
–IN A | 2 | 2 | I | Inverting input, channel A |
+IN A | 3 | 3 | I | Noninverting input, channel A |
–IN B | 6 | 6 | I | Inverting input, channel B |
+IN B | 5 | 5 | I | Noninverting input, channel B |
OUT A, VOUT A | 1 | 1 | O | Output, channel A |
OUT B, VOUT B | 7 | 7 | O | Output, channel B |
SHDN A | — | — | I | Shutdown, active low, channel A |
SHDN B | — | — | I | Shutdown, active low, channel B |
V– | 4 | 4 | — | Negative (lowest) power supply |
V+ | 8 | 8 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 8 | I | Inverting input, channel B |
+IN B | 7 | I | Noninverting input, channel B |
OUT A, VOUT A | 1 | O | Output, channel A |
OUT B, VOUT B | 9 | O | Output, channel B |
SHDN A | 5 | I | Shutdown, active low, channel A |
SHDN B | 6 | I | Shutdown, active low, channel B |
V– | 4 | — | Negative (lowest) power supply |
V+ | 10 | — | Positive (highest) power supply |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage | Supply, VS = (V+) – (V–) | 6 | V | |
Signal input pin(2) | (V–) – 0.5 | (V+) + 0.5 | ||
Current | Signal input pin(2) | –10 | 10 | mA |
Output short-circuit current(3) | Continuous | |||
Temperature | Operating range, TA | –40 | 150 | °C |
Junction, TJ | 150 | |||
Storage, Tstg | –65 | 150 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 | |||
Machine model (MM) | ±200 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VS | Specified voltage | 1.8 | 5.5 | V |
TA | Specified temperature | –40 | 125 | °C |
THERMAL METRIC | OPA320 | OPA320S | UNIT | |
---|---|---|---|---|
DBV (SOT-23) | DBV (SOT-23) | |||
5 PINS | 6 PINS | |||
RθJA | Junction-to-ambient thermal resistance(1) | 219.3 | 177.5 | °C/W |
RθJC(top) | Junction-to-case(top) thermal resistance | 107.5 | 108.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 57.5 | 27.4 | °C/W |
ψJT | Junction-to-top characterization parameter | 7.4 | 13.3 | °C/W |
ψJB | Junction-to-board characterization parameter | 56.9 | 26.9 | °C/W |
RθJC(bot) | Junction-to-case(bottom) thermal resistance | — | — | °C/W |
THERMAL METRIC(1) | OPA2320 | UNIT | |||
---|---|---|---|---|---|
D (SOIC) | DGK (VSSOP) | DRG (SON) | |||
8 PINS | 8 PINS | 8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 122.6 | 174.8 | 50.6 | °C/W |
RθJC(top) | Junction-to-case(top) thermal resistance | 67.1 | 43.9 | 54.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 64 | 95 | 25.2 | °C/W |
ψJT | Junction-to-top characterization parameter | 13.2 | 2 | 0.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 63.4 | 93.5 | 25.3 | °C/W |
RθJC(bot) | Junction-to-case(bottom) thermal resistance | — | — | 5.7 | °C/W |
THERMAL METRIC(1) | OPA2320S | UNIT | |
---|---|---|---|
DGS (VSSOP) | |||
10 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 171.5 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 43 | °C/W |
RθJB | Junction-to-board thermal resistance | 91.4 | °C/W |
ψJT | Junction-to-top characterization parameter | 1.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 89.9 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | ||||||||
VOS | Input offset voltage | 40 | 150 | µV | ||||
dVOS/dT | Input offset voltage vs temperature |
VS = 5.5 V, TA = –40°C to 125°C | 1.5 | 5 | µV/°C | |||
PSR | Input offset voltage vs power supply |
VS = 1.8 V to 5.5 V, TA = 25°C | 5 | 20 | µV/V | |||
VS = 1.8 V to 5.5 V, TA = –40°C to 125°C | 15 | |||||||
Channel separation | 1 kHz | 130 | dB | |||||
INPUT VOLTAGE | ||||||||
VCM | Common-mode voltage | (V–) – 0.1 | (V+) + 0.1 | V | ||||
CMRR | Common-mode rejection ratio | VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V, TA = 25°C | 100 | 114 | dB | |||
VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V, TA = –40°C to 125°C | 96 | |||||||
INPUT BIAS CURRENT | ||||||||
IB | Input bias current | TA = 25°C | ±0.2 | ±0.9 | pA | |||
TA = –40°C to 85°C | ±50 | |||||||
TA = –40°C to 125°C | OPA2320 and OPA2320S | ±400 | ||||||
OPA320 and OPA320S | ±600 | |||||||
IOS | Input offset current | TA = 25°C | ±0.2 | ±0.9 | pA | |||
TA = –40°C to 85°C | ±50 | |||||||
TA = –40°C to 125°C | ±400 | |||||||
NOISE | ||||||||
Input voltage noise | f = 0.1 Hz to 10 Hz | 2.8 | µVPP | |||||
en | Input voltage noise density | f = 1 kHz | 8.5 | nV/√Hz | ||||
f = 10 kHz | 7 | |||||||
in | Input current noise density | f = 1 kHz | 0.6 | fA/√Hz | ||||
INPUT CAPACITANCE | ||||||||
Differential | 5 | pF | ||||||
Common mode | 4 | pF | ||||||
OPEN-LOOP GAIN | ||||||||
AOL | Open-loop voltage gain | 0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ, TA = 25°C | 114 | 132 | dB | |||
0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ, TA = –40°C to 125°C | 100 | 130 | ||||||
0.2 V < VO < (V+) – 0.2 V, RL = 2 kΩ, TA = 25°C | 108 | 123 | ||||||
0.2 V < VO < (V+) – 0.2 V, RL = 2 kΩ, TA = –40°C to 125°C | 96 | 130 | ||||||
PM | Phase margin | VS = 5 V, CL = 50 pF | 47 | ° | ||||
FREQUENCY RESPONSE, VS = 5 V, CL = 50 pF | ||||||||
GBP | Gain bandwidth product | Unity gain | 20 | MHz | ||||
SR | Slew rate | G = +1 | 10 | V/µs | ||||
tS | Settling time | to 0.1%, 2-V step, G = +1 | 0.25 | µs | ||||
to 0.01%, 2-V step, G = +1 | 0.32 | |||||||
to 0.0015%, 2-V step, G = +1(1) | 0.5 | |||||||
Overload recovery time | VIN × G > VS | 100 | ns | |||||
THD+N | Total harmonic distortion + noise(2) | VO = 4 VPP, G = 1, f = 10 kHz, RL = 10 kΩ | 0.0005% | |||||
VO = 2 VPP, G = 1, f = 10 kHz, RL = 600 Ω | 0.0011% | |||||||
OUTPUT | ||||||||
VO | Voltage output swing from both rails | RL = 10 kΩ, TA = 25°C | 10 | 20 | mV | |||
RL = 2 kΩ, TA = 25°C | 25 | 35 | ||||||
RL = 10 kΩ, TA = –40°C to 125°C | 30 | |||||||
RL = 2 kΩ, TA = –40°C to 125°C | 45 | |||||||
ISC | Short-circuit current | VS = 5.5 V | ±65 | mA | ||||
CL | Capacitive load drive | See Typical Characteristics | ||||||
RO | Open-loop output resistance | IO = 0 mA, f = 1 MHz | 90 | Ω | ||||
SHUTDOWN (3) | ||||||||
IQSD | Quiescent current per amplifier | All amplifiers disabled, SHDN = V– | 0.1 | 0.5 | µA | |||
OPA2320S only, SHDN A = VS–, SHDN B = VS+ | 1.6 | mA | ||||||
OPA2320S only, SHDN A = VS+, SHDN B = VS– | 1.6 | |||||||
VIH | High-level input voltage | Amplifier enabled, VS– + 0.7 [(VS+) + |VS–|] | 0.7 × VS+ | 5.5 | V | |||
VIL | Low-level input voltage | Amplifier disabled, VS– + 0.3 [(VS+) + |VS–|] | 0.3 × VS+ | V | ||||
tON | Amplifier enable time(4) | G = 1, VOUT = 0.1 × VS/2, full shutdown(5) | 20 | µs | ||||
OPA2320S only, partial shutdown(5) | 6 | |||||||
tOFF | Amplifier disable time(4) | G = 1, VOUT = 0.1 × VS/2 | 3 | µs | ||||
SHDN pin input bias current (per pin) | VIH = 5 V | 0.13 | µA | |||||
VIL = 0 V | 0.04 | |||||||
POWER SUPPLY | ||||||||
VS | Specified voltage | 1.8 | 5.5 | V | ||||
IQ | Quiescent current per amplifier, OPA320 and OPA320S |
IO = 0 mA, VS = 5.5 V, TA = 25°C | 1.5 | 1.75 | mA | |||
IO = 0 mA, VS = 5.5 V, TA = –40°C to 125°C | 1.85 | |||||||
Quiescent current per amplifier, OPA2320 and OPA2320S |
IO = 0 mA, VS = 5.5 V, TA = 25°C | 1.45 | 1.6 | mA | ||||
IO = 0 mA, VS = 5.5 V, TA = –40°C to 125°C | 1.7 | |||||||
Power-on time | V+ = 0 V to 5 V, to 90% IQ level | 28 | µs |