SBOS522A June   2010  – November 2019 OPA333-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      0.1-Hz to 10-Hz Noise
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail-to-Rail Input Voltage
      2. 7.3.2 Internal Offset Correction
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Achieving Output Swing to the Op Amp Negative Rail
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Voltage-to-Current (V-I) Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Precision, Low-Level Voltage-to-Current (V-I) Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Composite Amplifier
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
      4. 8.2.4 Temperature Measurement
      5. 8.2.5 Single Op-Amp Bridge-Amplifier
      6. 8.2.6 Low-Side Current-Monitor
      7. 8.2.7 High-Side Current Monitor
      8. 8.2.8 Thermistor Measurement
      9. 8.2.9 Precision Instrumentation Amplifier
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.3.1 Design Requirements

The design requirements for this block design are:

  • System supply voltage: 5 V dc
  • ADC supply voltage: 3.3 V dc
  • ADC sampling rate: 1 MSPS
  • ADC reference voltage (VREF): 4.5 V dc
  • ADC input signal: A differential input signal with amplitude of Vpk = 4.315 V (–0.4 dBFS to avoid clipping) and frequency of fIN = 10 kHz are applied to each differential input of the ADC