SBOS479A March   2009  – April 2018 OPA356-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Output Drive
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Optimizing The Transimpedance Circuit
        3. 8.2.1.3 Application Curve
      2. 8.2.2 High-Impedance Sensor Interface
      3. 8.2.3 Driving ADCs
      4. 8.2.4 Active Filter
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

VS = 2.7 V to 5.5 V, RF = 604 Ω, RL = 150 Ω connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS TA(1) MIN TYP MAX UNIT
VOS Input offset voltage VS = 5 V, VCM = V– + 0.8 V 25°C ±2 ±9 mV
Full range ±15
ΔVOS/ΔT Offset voltage drift over temperature Full range ±7 µV/°C
PSRR Offset voltage drift vs power supply VS = 2.7 V to 5.5 V,
VCM = VS / 2 – 0.15 V		 25°C ±80 ±350 µV/V
IB Input bias current 25°C 3 ±50 pA
IOS Input offset current 25°C ±1 ±50 pA
Vn Input voltage noise density f = 1 MHz 25°C 5.8 nV/√Hz
In Input current noise density f = 1 MHz 25°C 50 fA/√Hz
VCM Input common-mode voltage range 25°C V– – 0.1 V+ – 1.5 V
CMRR Input common-mode rejection ratio VS = 5.5 V, –0.1 V < VCM< 4 V 25°C 66 80 dB
Full range 66
ZID Differential input impedance 25°C 1013 || 1.5 Ω || pF
ZICM Common-mode input impedance 25°C 1013 || 1.5 Ω || pF
AOL Open-loop gain VS = 5 V, 0.3 V < VO< 4.7 V 25°C 84 92 dB
Full range 80
f–3dB Small-signal bandwidth G = 1, VO = 100 mVp-p, RF = 0 Ω 25°C 450 MHz
G = 2, VO = 100 mVp-p, RL = 50 Ω 100
G = 2, VO = 100 mVp-p, RL = 150 Ω 170
G = 2, VO = 100 mVp-p, RL = 1 kΩ 200
GBW Gain-bandwidth product G = 10, RL = 1 kΩ 25°C 200 MHz
f0.1dB Bandwidth for 0.1-dB gain flatness G = 2, VO = 100 mVp-p, RF = 560 Ω 25°C 75 MHz
SR Slew rate VS = 5 V, G = 2, 4-V output step 25°C +300 V/µs
–360
tr, tf Rise and fall times G = 2, VO = 200 mVp-p, 10% to 90% 25°C 2.4 ns
G = 2, VO = 2 Vp-p, 10% to 90% 8
tsettle Settling time 0.1% VS = 5 V, G = 2, 2-V output step 25°C 30 ns
0.01% 120
Overload recovery time VIN × Gain = VS 25°C 8 ns
Harmonic distortion Second harmonic G = 2, f = 1 MHz, VO = 2 Vp-p,
RL = 200 Ω		 25°C –81 dBc
Third harmonic 25°C –93
Differential gain error NTSC, RL = 150 Ω 25°C 0.02%
Differential phase error NTSC, RL = 150 Ω 25°C 0.05 °
Voltage output swing from rail VS = 5 V, RL = 150 Ω, AOL> 84 dB 25°C 0.2 0.3 V
VS = 5 V, RL = 1 kΩ 0.1
VS = 5 V, RL = 50 Ω 0.4 0.6
IO Output current(2) Continuous 25°C ±60 mA
Peak VS = 5 V ±100
VS = 3 V ±80
Short-circuit current 25°C +250 mA
–200
Closed-loop output impedance 25°C 0.02 Ω
IQ Quiescent current VS = 5 V, IO = 0 25°C 8.3 11 mA
Full range 14
Thermal shutdown junction temperature Shutdown 25°C 160 °C
Reset from shutdown 140
(1) Full range TA = –40°C to 125°C.
(2) See Figure 20.