SBOSA02 August   2021 OPA397

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low Operating Voltage
      2. 7.3.2 Low Input Bias Current
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ Simulation Software (Free Download)
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VS = 5.5 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)

GUID-20210727-CA0I-C8B2-LP7S-HN0QDSJGMHLZ-low.png
 VS = 5.0 V
Figure 6-1 Offset Voltage Distribution
GUID-20210107-CA0I-MGTG-QTFT-P5GLDHKRQRXB-low.gif
VS = 1.7 V
Figure 6-3 Quiescent Current Distribution
GUID-20210727-CA0I-9ZHP-DHBB-MWVNPPRQ3RVG-low.png
 
Figure 6-5 Closed-Loop Gain and Phase vs Frequency
GUID-20210727-CA0I-ZDFJ-P0ZM-G0FSCWHXKMBK-low.png
 VS = 3.3 V
Figure 6-7 Input Bias Current vs Common-Mode Voltage
GUID-20210727-CA0I-1R2Z-8FMG-LHHQ0LVKCXND-low.png
 
Figure 6-9 Output Voltage Swing vs Output Current (Sourcing)
GUID-20210727-CA0I-SCJX-MSJQ-CWQGTHJ2CJN8-low.png
VS = ±0.85 V
Figure 6-11 Output Voltage Swing vs Output Current (Sourcing)
GUID-20210727-CA0I-K1F2-TFN7-QJ3G9P101XVX-low.png
 
Figure 6-13 CMRR and PSRR vs Frequency
GUID-20210727-CA0I-KB4J-0N5F-4PL4FCTQC2PW-low.png
5 Units 
Figure 6-15 PSRR vs Temperature
GUID-20210727-CA0I-PN40-KRG7-ZQDBZBMTKSB9-low.png
VOUT =  1 VRMS
Figure 6-17 THD+N Ratio vs Frequency
GUID-20210728-CA0I-9CH7-C1PQ-VJZ8SM9XZTKM-low.png
 
Figure 6-19 0.1-Hz to 10-Hz Noise
GUID-20210727-CA0I-B3LV-FTBT-P9QZGJQHFVB3-low.png
5 Units 
Figure 6-21 Quiescent Current vs Temperature
GUID-20210727-CA0I-PPC7-0N2J-DQBKCVQ4L2N9-low.png
 
Figure 6-23 Open-Loop Output Impedance vs Frequency
GUID-20210727-CA0I-HXBQ-2BRW-CB0KSRH04J9R-low.png
G = 1
Figure 6-25 Small-Signal Overshoot vs Capacitive Load (10‑mV Step)
GUID-20210727-CA0I-F734-FJ1K-RMW656QDXP7R-low.png
 
Figure 6-27 Positive Overload Recovery
GUID-20210727-CA0I-GRJH-ZZ0K-VLRBKM470G7Z-low.png
G = 1
Figure 6-29 Small-Signal Step Response (10-mV Step)
GUID-20210727-CA0I-ZH24-Z3PD-98CQVTQJL8LL-low.png
G = 1
Figure 6-31 Large-Signal Step Response (4-V Step)
GUID-20210728-CA0I-LCWM-FQNH-NKRJXCT8HWVM-low.png
 
Figure 6-33 Settling Time
GUID-20210107-CA0I-DX35-SC1C-RWT4X7GTWM2V-low.gif
 
Figure 6-2 Quiescent Current Distribution
GUID-20210727-CA0I-6MJ9-K4P7-5JMFRFC8HKVC-low.png
 
Figure 6-4 Open-Loop Gain and Phase vs Frequency
GUID-20210727-CA0I-3GVG-C1BJ-LXKCJVQ6J6N9-low.png
 VS = 1.7 V
Figure 6-6 Input Bias Current vs Common-Mode Voltage
GUID-20210727-CA0I-4ZWM-GTT5-FBDMZC07XBR0-low.png
 
Figure 6-8 Input Bias Current vs Temperature
GUID-20210727-CA0I-PZSP-WCR1-X16FX3HNMZSX-low.png
 
Figure 6-10 Output Voltage Swing vs Output Current (Sinking)
GUID-20210727-CA0I-ZMN9-CW1R-ZXSBFKL53XXB-low.png
VS = ±0.85 V
Figure 6-12 Output Voltage Swing vs Output Current (Sinking)
GUID-20210727-CA0I-GBG9-JW3S-3WDXQMHWNGG9-low.png
5 Units 
Figure 6-14 CMRR vs Temperature
GUID-20210728-CA0I-FCG5-CDNR-JNVSXWFLDKLN-low.png
 
Figure 6-16 Voltage Noise vs Frequency
GUID-20210727-CA0I-RPPV-M5GX-HXM7JP5RH3F2-low.png
 f = 1 kHz
Figure 6-18 THD+N vs Output Amplitude
GUID-20210727-CA0I-2CWH-MWSZ-2CBVM3SS2FJD-low.png
 5 Units
Figure 6-20 Quiescent Current vs Supply Voltage
GUID-20210727-CA0I-VNL6-CCMB-DCJDHNZCNR6N-low.png
5 Units 
Figure 6-22 Open-Loop Gain vs Temperature
GUID-20210727-CA0I-VVCC-P0DT-XMC97ZNVBDDK-low.png
 G = –1
Figure 6-24 Small-Signal Overshoot vs Capacitive Load (10‑mV Step)
GUID-20210727-CA0I-0PVW-F99N-F5G1QB3XWPPZ-low.png
 
Figure 6-26 No Phase Reversal
GUID-20210727-CA0I-VSTX-JG7K-KFML2JZD40ZM-low.png
 
Figure 6-28 Negative Overload Recovery
GUID-20210727-CA0I-ZZS8-XQHG-01RR5VCJNMTJ-low.png
G = –1
Figure 6-30 Small-Signal Step Response (10-mV Step)
GUID-20210727-CA0I-XGMT-P9L6-2TLZ7MHFZXZB-low.png
G = –1
Figure 6-32 Large-Signal Step Response (4-V Step)
GUID-20210727-CA0I-VWDW-P2PC-8SSS4WPHX9WM-low.png
PRF = –10 dBm
Figure 6-34 EMIRR vs Frequency