SBOSA61B April   2021  – December 2021 OPA3S2859-EP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revison History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Programmable Gain
      2. 8.3.2 Slew Rate
      3. 8.3.3 Input and ESD Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply and Single-Supply Operation
      2. 8.4.2 Power-Down Mode
      3. 8.4.3 Gain Select Mode (SEL)
      4. 8.4.4 Latch Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Switching Characteristics

VS+ = 5 V, VS- = 0 V, input common-mode biased at midsupply, RF0 = 1 kΩ, RF1 = 10 kΩ, RF2 = 100 kΩ, RL = 200 Ω, output load is referenced to midsupply, and TA ≈ +25°C (unless otherwise noted), see figure 7-1 for schematic configuration. (1) (2) 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
GAIN SWITCHES
Switch transition-time (5) SW0 OFF to SW1 ON 160 ns
SW0 OFF to SW2 ON 230
SW1 OFF to SW0 ON 80
SW1 OFF to SW2 ON 230
SW2 OFF to SW0 ON 80
SW2 OFF to SW1 ON 110
CCOM0 COM capacitance (3) (6) SWCOM0  ON;  SWCOM1 and SWCOM2 OFF 1.3 pF
CCOM1 SWCOM1  ON;  SWCOM0 and SWCOM2 OFF 1.2
CCOM2 SWCOM2  ON;  SWCOM0 and SWCOM1 OFF 1.2
CCOM_OPEN SWCOM0 , SWCOM1 and SWCOM2 OFF 1.2
CFB0 FB capacitance (5) (7) SW0 ON 1.9
CFB1 SW1 ON 1.6
CFB2 SW2 ON 1.5
CFB0_OPEN SW0 OFF 1.4
CFB1_OPEN SW1 OFF 1.2
CFB2_OPEN SW2 OFF 1.1
RON_COM0 On resistance (8) (9) 80 Ω
RON_FB0 38
RON_COM1 125
RON_FB1 37
RON_COM2 375
RON_FB2 35
On resistance channel-to-channel matching (3) (4) SWCOM0 for Channel A and B 0.15 Ω
SWFB0 for Channel A and B 0.4
SWCOM1 for Channel A and B 0.45
SWFB1 for Channel A and B 0.07
SWCOM2 for Channel A and B 3
SWFB2 for Channel A and B 0.12
LOGIC PIN FUNCTION (LATCH, SEL)
Logic low threshold Logic low below the threshold voltage,
TA = -55°C to +125°C		 VS+ - 1.5 VS+ - 1.3 V
Logic high threshold Logic high above the threshold voltage,
TA = -55°C to +125°C		 VS+ - 1.2 VS+ - 0.8 V
Bias current VPIN = VS- or VS+ 6 µA
Bias current VPIN = VS- or VS+ , TA = -55°C to +125°C 22 µA
Bias current VPIN at switching threshold 160 µA
Bias current VPIN at switching threshold,
TA = -55°C to +125°C		 405 µA
Setup time 100 ns
Hold time 100 ns
(1) All the specifications  apply for both Channels A and B, unless otherwise noted.
(2) When switching from one  gain condition to another, the new gain switches are closed before opening the previous gain switches (make-before-break).
(3) SWCOM0, SWCOM1, SWCOM2 refer to switch on the common-mode side (COM) for the different gain options. 
(4) SWFB0, SWFB1, SWFB2 refer to switch on the feedback side (FB) for the different gain options. 
(5) SW0, SW1, SW2 refers to the two switches needed for a given gain condition. For example, SW0 refers to SWCOM0 and SWFB0.
(6) CCOM0,  CCOM1, CCOM2 is the capacitance at the COM pin for different gain options. It is equal to ON capacitance of closed switch + OFF capacitance of open switches.
(7) CFB0, CFB1, CFB2  is the capacitance at the FBX pin. It is equal to ON capacitance of the gain option selected (SWCOM0 + SWFB0  capacitance).
(8) RON_COM0, RON_COM1, RON_COM2, refer to ON resistance for the COM side switch. 
(9) RON_FB0, RON_FB1, RON_FB2, refer to ON resistance for the FB side switch.