9 Revision History
Changes from Revision B (September 2015) to Revision C (August 2024)
- Updated the numbering format for tables, figures, and
cross-references throughout the documentGo
- Added information about newer, next-generation
OPA2156Go
- Changed high open-loop gain from 130dB (600Ω load) to 126dB (2kΩ
load)Go
- Deleted all single and quad channel PDIP package references from
this data sheetGo
- Updated Device Information tableGo
- Updated Pin Configuration and Functions
formatGo
- Changed OPA132 pin 1 and pin 8 from "Offset Trim" to
"NC"Go
- Changed input voltage from (V–) – 0.7 and (V+) + 0.7 to (V–) – 0.5 and (V+) + 0.5 in Absolute Maximum Ratings
Go
- Added input current and related footnote to Absolute Maximum Ratings
Go
- Added Thermal Information
Go
- Changed format of Electrical Characteristics to latest standardGo
- Updated nominal conditions in the header of Electrical Characteristics
Go
- Added ± to power supply rejection ratio (offset vs temperature) and input bias current valuesGo
- Changed common-mode voltage MAX value from (V+) – 2.5V to (V+) – 3.5VGo
- Changed common-mode rejection ratio and common-mode input impedance test conditions from –12.5V ≤ VCM ≤ 12.5V to –12.5V ≤ VCM ≤ 11.5VGo
- Changed differential input impedance from 1010Ω || 2pF to 1010Ω || 10pFGo
- Changed common-mode input impedance from 1010Ω || 6pF to 1010Ω || 7pFGo
- Changed overload recovery time from 0.5µs to 600nsGo
- Changed overload recovery time test condition from G = ± to G = ±1 to fix typoGo
- Moved voltage output negative MIN values to MAX valuesGo
- Deleted redundant power supply and temperature range sections already covered in Recommended Operating Conditions
Go
- Deleted note 1 from Electrical CharacteristicsGo
- Changed Typical Characteristics header test conditions to
match Electrical Characteristics
Go
- Changed Figure 16, Small-Signal Overshoot vs Load Capacitance
into two plots, Figure 5-16 for G = +1 and Figure 5-17 for G =
–1Go
- Updated Figure 5-18, Output Voltage Swing vs Output
Current
Go
- Updated Functional Block Diagram
Go
- Updated Offset Voltage Trim
Go
- Updated Figure 7-3, OPA132 Layout Example for the Noninverting
Configuration
Go
Changes from Revision A (June 2004) to Revision B (September 2015)
- Added ESD Ratings, Feature Description, Device
Functional Modes, Application and Implementation, Power Supply
Recommendations, Layout, Device and Documentation Support,
and Mechanical, Packaging, and Orderable Information
sectionsGo