SBOS557E August   2011  – April 2018 OPA170 , OPA2170 , OPA4170

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Smallest Packaging for 36-V Operational Amplifiers
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions: OPA170
    2.     Pin Functions: OPA2170
    3.     Pin Functions: OPA4170
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA170
    5. 7.5 Thermal Information: OPA2170
    6. 7.6 Thermal Information: OPA4170
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Characteristics
      2. 8.3.2 Phase-Reversal Protection
      3. 8.3.3 Electrical Overstress
      4. 8.3.4 Capacitive Load and Stability
    4. 8.4 Device Functional Modes
      1. 8.4.1 Common-Mode Voltage Range
      2. 8.4.2 Overload Recovery
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Unity-Gain Buffer
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
        1. 12.1.2.1 TINA-TI™ (Free Software Download)
        2. 12.1.2.2 DIP Adapter EVM
        3. 12.1.2.3 Universal Operational Amplifier EVM
        4. 12.1.2.4 TI Precision Designs
        5. 12.1.2.5 WEBENCH Filter Designer
        6. 12.1.2.6 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

OPA170 DRL Package
5-Pin SOT
Top View
OPA170 OPA2170 OPA4170 po_sot-553_bos557.gif
OPA170 DBV Package
5-Pin SOT-23
Top View
OPA170 OPA2170 OPA4170 po_sot23-5_bos557.gif
OPA170 D Package
8-Pin SOIC
Top View
OPA170 OPA2170 OPA4170 po_so-8_bos557.gif

Pin Functions: OPA170

PIN I/O DESCRIPTION
NAME SOT SOT-23 D
IN– (–IN) 3 4 2 I Negative (inverting) input
IN+ (+IN) 1 3 3 I Positive (noninverting) input
NC(1) — — 1, 5, 8 — No internal connection (can be left floating)
OUT 4 1 6 O Output
V+ 5 5 7 — Positive (highest) power supply
V– 2 2 4 — Negative (lowest) power supply
(1) NC indicates no internal connection.
OPA2170 D, DGK, and DCU Packages
8-Pin VSSOP, SOIC, and VSSOP (micro size)
Top View
OPA170 OPA2170 OPA4170 po_vssop-8_bos557.gif
OPA2170 DSG Package
8-Pin WSON
Top View
OPA170 OPA2170 OPA4170 OPA2170_dsg_pinout.gif

Pin Functions: OPA2170

PIN I/O DESCRIPTION
NAME SOIC VSSOP VSSOP
(micro size)		 WSON
–IN A 2 2 2 2 I Inverting input, channel A
–IN B 6 6 6 6 I Inverting input, channel B
+IN A 3 3 3 3 I Noninverting input, channel A
+IN B 5 5 5 5 I Noninverting input, channel B
OUT A 1 1 1 1 O Output, channel A
OUT B 7 7 7 7 O Output, channel B
V– 4 4 4 4 — Negative (lowest) power supply
V+ 8 8 8 8 — Positive (highest) power supply
OPA4170 D and PW Packages
14-Pin SOIC and TSSOP
Top View
OPA170 OPA2170 OPA4170 po_so-14_bos557.gif

Pin Functions: OPA4170

PIN I/O DESCRIPTION
NAME SOIC TSSOP
–IN A 2 2 I Inverting input, channel A
–IN B 6 6 I Inverting input, channel B
–IN C 9 9 I Inverting input, channel C
–IN D 13 13 I Inverting input, channel D
+IN A 3 3 I Noninverting input, channel A
+IN B 5 5 I Noninverting input, channel B
+IN C 10 10 I Noninverting input, channel C
+IN D 12 12 I Noninverting input, channel D
OUT A 1 1 O Output, channel A
OUT B 7 7 O Output, channel B
OUT C 8 8 O Output, channel C
OUT D 14 14 O Output, channel D
V– 11 11 — Negative (lowest) power supply
V+ 4 4 — Positive (highest) power supply