SBOS812H October   2017  – May 2020 OPA202 , OPA2202 , OPA4202

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      OPAx202 Excel Even When Directly Driving Heavy Capacitive Loads
      2.      Input Voltage Noise and Current Noise Spectral Density vs Frequency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: OPA202
    2.     Pin Functions: OPA2202
    3.     Pin Functions: OPA4202
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA202
    5. 6.5 Thermal Information: OPA2202
    6. 6.6 Thermal Information: OPA4202
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Capacitive Load and Stability
      2. 7.3.2 Output Current Limit
      3. 7.3.3 Noise Performance
      4. 7.3.4 Phase-Reversal Protection
      5. 7.3.5 Thermal Protection
      6. 7.3.6 Electrical Overstress
      7. 7.3.7 EMI Rejection
      8. 7.3.8 EMIRR +IN Test Configuration
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Noise Calculations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 WEBENCH Filter Designer Tool
        3. 11.1.1.3 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Support Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.8 EMIRR +IN Test Configuration

Figure 45 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the op amp noninverting input pin using a transmission line. The op amp is configured in a unity-gain buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large impedance mismatch at the op amp input causes a voltage reflection; however, this effect is characterized and accounted for when determining the EMIRR IN+. The resulting DC offset voltage is sampled and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that may interfere with multimeter accuracy.

OPA202 OPA2202 OPA4202 EMIRR_Test_CKT_SBOS079.gifFigure 45. EMIRR +IN Test Configuration