SBOS110C May   1998  – March 2023 OPA2227 , OPA2228 , OPA227 , OPA228 , OPA4227 , OPA4228

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA227, OPA228
    5. 6.5 Thermal Information: OPA2227, OPA2228
    6. 6.6 Thermal Information: OPA4227, OPA4228
    7. 6.7 Electrical Characteristics: OPAx227 
    8. 6.8 Electrical Characteristics: OPAx228 
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Offset Voltage and Drift
      2. 7.3.2 Operating Voltage
      3. 7.3.3 Offset Voltage Adjustment
      4. 7.3.4 Input Protection
      5. 7.3.5 Input Bias Current Cancellation
      6. 7.3.6 Noise Performance
      7. 7.3.7 Basic Noise Calculations
      8. 7.3.8 EMI Rejection Ratio (EMIRR)
        1. 7.3.8.1 EMIRR IN+ Test Configuration
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Using the OPAx228 in Low Gains
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Three-Pole, 20 kHz Low Pass, 0.5-dB Chebyshev Filter
      3. 8.2.3 Long-Wavelength Infrared Detector Amplifier
      4. 8.2.4 High Performance Synchronous Demodulator
      5. 8.2.5 Headphone Amplifier
      6. 8.2.6 Three-Band Active Tone Control (Bass, Midrange, and Treble)
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 TINA-TI™ Simulation Software (Free Download)
        2. 9.1.1.2 TI Reference Designs
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-9AA4302C-CE02-4B32-AA70-FBEEFE79EC23-low.gifFigure 5-1 OPA227, OPA228: D (8-Pin SOIC) or P (8-Pin PDIP) Package (Top View)
Table 5-1 Pin Functions: OPA227 and OPA228
PIN TYPE DESCRIPTION
NO. NAME
1 Offset Trim Input Input offset voltage trim (leave floating if not used)
2 -In Input Inverting input
3 +In Input Noninverting input
4 V- — Negative (lowest) power supply
5 NC — No internal connection (can be left floating)
6 Output Output Output
7 V+ — Positive (highest) power supply
8 Trim — Input offset voltage trim (leave floating if not used)
GUID-480F716B-ABC5-4F21-9E36-9C4A4815F071-low.gifFigure 5-2 OPA2227, OPA2228: D (8-Pin SOIC) or P (8-Pin PDIP) Package (Top View)
Table 5-2 Pin Functions: OPA2227 and OPA2228
PIN TYPE DESCRIPTION
NO. NAME
1 Out A Output Output channel A
2 –In A Input Inverting input channel A
3 +In A Input Noninverting input channel A
4 V- — Negative (lowest) power supply
5 +In B Input Noninverting input channel B
6 –In B Input Inverting input channel B
7 Out B Output Output channel B
8 V+ — Positive (highest) power supply
GUID-94FB9560-00AD-4DF8-9A00-7B0B6493BFFA-low.gifFigure 5-3 OPA4227, OPA4228: D (14-Pin SOIC) or N (14-Pin PDIP) Package (Top View)
Table 5-3 Pin Functions: OPA4227 and OPA4228
PIN TYPE DESCRIPTION
NO. NAME
1 Out A Output Output channel A
2 -In A Input Inverting input channel A
3 +In A Input Noninverting input channel A
4 V+ — Positive (highest) power supply
5 +In B Input Noninverting input channel B
6 -In B Input Inverting input channel B
7 Out B Output Output channel B
8 Out C Output Output channel C
9 -In C Input Inverting input channel C
10 +In C Input Noninverting input channel C
11 V- — Negative (lowest) power supply
12 +In D Input Noninverting input channel D
13 -In D Input Inverting input channel D
14 Out D Output Output channel D