OPAx376 Low-Noise, Low Quiescent Current, Precision Operational Amplifier e-trim Series
- SBOS406G June 2007 – December 2015 OPA2376 , OPA376 , OPA4376
  
  PRODUCTION DATA.

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DATA SHEET

OPAx376 Low-Noise, Low Quiescent Current, Precision Operational Amplifier e-trim Series

1 Features

Low Noise: 7.5 nV/√Hz at 1 kHz
0.1 Hz to 10 Hz Noise: 0.8 μV_PP
Quiescent Current: 760 μA (typical)
Low Offset Voltage: 5 μV (typ)
Gain Bandwidth Product: 5.5 MHz
Rail-to-Rail Input and Output
Single-Supply Operation
Supply Voltage: 2.2 V to 5.5 V
Space-Saving Packages:
- SC70, SOT-23, DSBGA, VSSOP, TSSOP

2 Applications

ADC Buffer
Audio Equipment
Medical Instrumentation
Handheld Test Equipment
Active Filtering
Sensor Signal Conditioning

3 Description

The OPA376 family represents a new generation of low-noise operational amplifiers with e-trim™, offering outstanding dc precision and ac performance. Rail-to-rail input and output, low offset (25 μV, maximum), low noise (7.5 nV/√Hz), quiescent current of 950 μA (maximum), and a 5.5-MHz bandwidth make this part very attractive for a variety of precision and portable applications. In addition, this device has a reasonably wide supply range with excellent PSRR, making it attractive for applications that run directly from batteries without regulation.

The OPA376 (single version) is available in MicroSIZE SC70-5, SOT-23-5, and SOIC-8 packages. The OPA2376 (dual) is offered in the DSBGA-8, VSSOP-8, and SOIC-8 packages. The OPA4376 (quad) is offered in a TSSOP-14 package. All versions are specified for operation from –40°C to +125°C.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
OPA376	SOIC (8)	4.90 mm × 3.91 mm
	SOT-23 (5)	2.90 mm × 1.60 mm
	SC70 (5)	2.00 mm × 1.25 mm
OPA2376	SOIC (8)	4.90 mm × 3.91 mm
	VSSOP (8)	3.00 mm × 3.00 mm
	DSBGA (8)	1.30 mm × 2.30 mm
OPA4376	TSSOP (14)	5.00 mm × 4.40 mm

For all available packages, see the package option addendum at the end of the data sheet.

Input Noise Voltage Spectral Density

OPA376 OPA2376 OPA4376 frontpage_input_voltage_noise_sbos406.gif

Offset Voltage Production Distribution

OPA376 OPA2376 OPA4376 frontpage_offset_voltage_production_sbos406.gif

4 Revision History

Changes from F Revision (March 2013) to G Revision

Added ESD Ratings, Thermal Information, Recommended Operating Conditions, Power Supply Recommendations, and Device and Documentation Support sections; existing sections may have movedGo
Changed WCSP to DSBGA and MSOP to VSSOP throughout data sheetGo
Changed dimensions shown in YZD package pinout figureGo

Changes from E Revision (January 2013) to F Revision

Changed unit (typo) for Quiescent Current feature bulletGo
Changed TSSOP-14 pinout for OPA4376Go

Changes from D Revision (August 2010) to E Revision

Changed rail-to-rail feature bullet to show input and outputGo
Changed description text to show rail-to-rail input and outputGo

Changes from C Revision (October 2008) to D Revision

Updated format of Electrical Characteristics tableGo
Updated Figure 11Go

5 Pin Configuration and Functions

OPA376: DBV Package

5-Pin SOT23

Top View

OPA376 OPA2376 OPA4376 po_sot23-5_bos406.gif

OPA376: DCK Package

5-Pin SC70-5

Top View

OPA376 OPA2376 OPA4376 po_sc70_bos406.gif

OPA376: D Package

8-Pin SOIC

Top View

1. NC denotes no internal connection.

Pin Functions: OPA376

PIN				I/O	DESCRIPTION
NAME	DBV	DCK	D	I/O	DESCRIPTION
+IN	3	1	3	I	Input signal ⁺
–IN	4	3	2	I	Input signal ^–
NC	—	—	1, 5, 8	—	No connection
OUT	1	4	6	O	Output signal
V⁺	5	5	7	—	Supply voltage⁺
V^–	2	2	4	—	Supply voltage^–

OPA2376: D and DGK Packages

8-Pin SOIC and 8-Pin VSSOP

Top View

OPA376 OPA2376 OPA4376 po_so_msop_bos406.gif

OPA2376: YZD Package

8-Pin DSBGA

Top View

OPA376 OPA2376 OPA4376 po_wcsp_bos406.gif

Pin Functions: OPA2376

PIN			I/O	DESCRIPTION
NAME	D AND DGK	YZD	I/O	DESCRIPTION
+IN A	3	C1	I	Input signal A⁺
–IN A	2	B1	I	Input signal A^–
+IN B	5	D2	I	Input signal B⁺
–IN B	6	C2	I	Input signal B^–
OUT A	1	A1	O	Output signal A
OUT B	7	B2	O	Output signal B
V⁺	8	A2	—	Supply voltage⁺
V^–	4	D1	—	Supply voltage^–

OPA4376: PW Package

14-Pin TSSOP

Top View

OPA376 OPA2376 OPA4376 po_so-14_bos516.gif

Pin Functions: OPA4376

PIN		I/O	DESCRIPTION
NAME	PW	I/O	DESCRIPTION
+IN A	3	I	Input signal A⁺
–IN A	2	O	Input signal A^–
+IN B	5	I	Input signal B⁺
–IN B	6	O	Input signal B^–
+IN C	10	I	Input signal C⁺
–IN C	9	O	Input signal C^–
+IN D	12	I	Input signal D⁺
–IN D	13	O	Input signal D^–
OUT A	1	O	Output signal A
OUT B	7	O	Output signal B
OUT C	8	O	Output signal C
OUT D	14	O	Output signal D
V⁺	4	—	Supply voltage⁺
V^–	11	—	Supply voltage^–

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Voltage	Supply, V_S = (V⁺) – (V^–)		7	V
Voltage	Signal input pin⁽²⁾	(V^–) – 0.5	(V⁺) + 0.5	V
Current	Signal input pin⁽²⁾	–10	10	mA
Current	Output short-circuit⁽³⁾	Continuous
Temperature	Operating range, T_A	–40	150	°C
	Junction, T_J		150
	Storage, T_stg	–65	150

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should be current limited to 10 mA or less.

(3) Short-circuit to ground, one amplifier per package.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	±4000	V
		Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	±1000
		Machine model	±200

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
(V⁺) – (V^–)	Supply voltage	2.2 (±1.1)		5.5 (±2.75)	V
T_A	Operating temperature	–40		150	°C

6.4 Thermal Information: OPA376

THERMAL METRIC⁽¹⁾		OPA376			UNIT
		DBV (SOT-23)	DCK (SC70)	D (SOIC)
		5 PINS	5 PINS	8 PINS
R_θJA	Junction-to-ambient thermal resistance	273.8	267.0	100.1	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	126.8	80.9	42.4	°C/W
R_θJB	Junction-to-board thermal resistance	85.9	54.8	41.0	°C/W
ψ_JT	Junction-to-top characterization parameter	10.9	1.2	4.8	°C/W
ψ_JB	Junction-to-board characterization parameter	84.9	54.1	40.3	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	n/a	n/a	n/a	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Thermal Information: OPA2376

THERMAL METRIC⁽¹⁾		OPA2376			UNIT
		D (SOIC)	DGK (VSSOP)	YZD (DSBGA)
		8 PINS	8 PINS	8 PINS
R_θJA	Junction-to-ambient thermal resistance	111.1	171.2	119.2	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	54.7	63.9	0.6	°C/W
R_θJB	Junction-to-board thermal resistance	51.7	92.8	27.6	°C/W
ψ_JT	Junction-to-top characterization parameter	10.5	9.2	4.0	°C/W
ψ_JB	Junction-to-board characterization parameter	51.2	91.2	27.6	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	n/a	n/a	n/a	°C/W

(1) For more information about traditional and new thermal metrics, see theSemiconductor and IC Package Thermal Metrics application report, SPRA953.

6.6 Thermal Information: OPA4376

THERMAL METRIC⁽¹⁾		OPA4376	UNIT
		PW
		14 PINS
R_θJA	Junction-to-ambient thermal resistance	107.8	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	29.6	°C/W
R_θJB	Junction-to-board thermal resistance	52.6	°C/W
ψ_JT	Junction-to-top characterization parameter	1.5	°C/W
ψ_JB	Junction-to-board characterization parameter	51.6	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	n/a	°C/W

6.7 Electrical Characteristics

At T_A = 25°C, R_L = 10 kΩ connected to V_S / 2, V_CM = V_S / 2, and V_O_UT = V_S / 2, unless otherwise noted.

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
OFFSET VOLTAGE
V_OS	Input offset voltage				5	25	μV
dV_OS/dT	Input offset voltage versus temperature	T_A = –40°C to +85°C			0.26	1	μV/°C
dV_OS/dT	Input offset voltage versus temperature	T_A = –40°C to +125°C			0.32	2	μV/°C
PSRR	Input offset voltage versus power supply	T_A = 25°C, V_S = 2.2 V to 5.5 V, V_CM < (V⁺) – 1.3 V			5	20	μV/V
PSRR	Input offset voltage versus power supply	T_A = –40°C to +125°C, V_S = 2.2 V to 5.5 V, V_CM < (V⁺) – 1.3 V			5		μV/V
	Channel separation, dc (dual, quad)				0.5		mV/V
INPUT BIAS CURRENT
I_B	Input bias current	T_A = 25°C			0.2	10	pA
I_B	Input bias current	T_A = –40°C to +125°C		See Typical Characteristics			pA
I_OS	Input offset current				0.2	10	pA
NOISE
	Input voltage noise	f = 0.1 Hz to 10 Hz			0.8		μV_PP
e_n	Input voltage noise density	f = 1 kHz			7.5		nV/√Hz
i_n	Input current noise	f = 1 kHz			2		fA/√Hz
INPUT VOLTAGE RANGE
V_CM	Common-mode voltage range			(V^–) – 0.1		(V⁺) + 0.1	V
CMRR	Common-mode rejection ratio	(V^–) < V_CM < (V⁺) – 1.3 V		76	90		dB
INPUT CAPACITANCE
	Differential				6.5		pF
	Common-mode				13		pF
OPEN-LOOP GAIN
A_OL	Open-loop voltage gain	50 mV < V_O < (V⁺) – 50 mV, R_L = 10 kΩ		120	134		dB
A_OL	Open-loop voltage gain	100 mV < V_O< (V⁺) – 100 mV, R_L = 2 kΩ		120	126		dB
FREQUENCY RESPONSE C_L = 100 pF, V_S = 5.5 V
GBW	Gain-bandwidth product				5.5		MHz
SR	Slew rate	G = 1			2		V/μs
t_S	Settling time	To 0.1%, 2-V step , G = 1			1.6		μs
t_S	Settling time	To 0.01%, 2-V step , G = 1			2		μs
	Overload recovery time	V_IN × gain > V_S			0.33		μs
THD+N	Total harmonic distortion + noise	V_O = 1 V_RMS, G = 1, f = 1 kHz, R_L = 10 kΩ			0.00027%
OUTPUT
	Voltage output swing from rail	T_A = 25°C, R_L = 10 kΩ	SC70-5, SOT23-5, SO-8, VSSOP-8, and TSSOP-14 packages only		10	20	mV
		T_A = 25°C, R_L = 10 kΩ	DSBGA package only		20	30	mV
		T_A = –40°C to +125°C, R_L = 10 kΩ				40	mV
		T_A = 25°C, R_L = 2 kΩ	SC70-5, SOT23-5, SO-8, VSSOP-8, and TSSOP-14 packages only		40	50	mV
		T_A = 25°C, R_L = 2 kΩ	DSBGA package only		50	60	mV
		T_A = –40°C to +125°C, R_L = 2 kΩ				80	mV
I_SC	Short-circuit current				+30, –50		mA
C_LOAD	Capacitive load drive			See Typical Characteristics
R_O	Open-loop output impedance				150		Ω
POWER SUPPLY
V_S	Specified voltage range			2.2		5.5	V
	Operating voltage range				2 to 5.5		V
I_Q	Quiescent current per amplifier	T_A = 25°C, I_O = 0, V_S = 5.5 V, V_CM < (V⁺) – 1.3 V			760	950	μA
I_Q	Quiescent current per amplifier	T_A = –40°C to +125°C				1	mA
TEMPERATURE
	Specified range			–40		125	°C
	Operating range			–40		150	°C

6.8 Typical Characteristics

At T_A = 25°C, V_S = 5 V, R_L = 10 kΩ connected to V_S / 2, V_CM = V_S / 2, and V_O_UT = V_S / 2, unless otherwise noted.

OPA376 OPA2376 OPA4376 tc_open_gp-freq_bos406.gif

Figure 1. Open-Loop Gain and Phase vs Frequency

OPA376 OPA2376 OPA4376 tc_open_psrr-tmp_bos406.gif

Figure 3. Open-Loop Gain and Power-Supply Rejection Ratio vs Temperature

OPA376 OPA2376 OPA4376 tc_v_noise_bos406.gif

Figure 5. Input Voltage Noise Spectral Density

OPA376 OPA2376 OPA4376 tc_cmrr-tmp_bos406.gif

Figure 7. Common-Mode Rejection Ratio vs Temperature

OPA376 OPA2376 OPA4376 tc_iq_cur-sv_bos406.gif

Figure 9. Quiescent and Short-Circuit Current vs Supply Voltage

OPA376 OPA2376 OPA4376 tc_ibc-tmp_bos406.gif

Figure 11. Input Bias Current vs Temperature

OPA376 OPA2376 OPA4376 tc_offset_vltg_bos406.gif

Figure 13. Offset Voltage Production Distribution

OPA376 OPA2376 OPA4376 tc_max_out-frq_bos406.gif

Figure 15. Maximum Output Voltage vs Frequency

OPA376 OPA2376 OPA4376 tc_resp_sm_bos406.gif

Figure 17. Small-Signal Pulse Response

OPA376 OPA2376 OPA4376 tc_set_tim-closed_bos406.gif

Figure 19. Settling Time vs Closed-Loop Gain

OPA376 OPA2376 OPA4376 tc_oloop_ro-frq_bos406.gif

Figure 21. Open-Loop Output Resistance vs Frequency

OPA376 OPA2376 OPA4376 tc_ps-cmrr-freq_bos406.gif

Figure 2. Power-Supply and Common-Mode Rejection Ratio vs Frequency

OPA376 OPA2376 OPA4376 tc_input_vr_bos406.gif

Figure 4. 0.1-Hz to 10-Hz Input Voltage Noise

OPA376 OPA2376 OPA4376 tc_hd-freq_bos406.gif

Figure 6. Total Harmonic Distortion + Noise vs Frequency

OPA376 OPA2376 OPA4376 tc_iq-tmp_bos406.gif

Figure 8. Quiescent Current vs Temperature

OPA376 OPA2376 OPA4376 tc_short_cir-tmp_bos406.gif

Figure 10. Short-Circuit Current vs Temperature

OPA376 OPA2376 OPA4376 tc_outv_outc_bos406.gif

Figure 12. Output Voltage vs Output Current

OPA376 OPA2376 OPA4376 tc_offset_vltg_drift_bos406.gif

Figure 14. Offset Voltage Drift Production Distribution (–40°C to 125°C)

OPA376 OPA2376 OPA4376 tc_ss-load_cap_bos406.gif

Figure 16. Small-Signal Overshoot vs Load Capacitance

OPA376 OPA2376 OPA4376 tc_resp_lg_bos406.gif

Figure 18. Large-Signal Pulse Response

OPA376 OPA2376 OPA4376 tc_ch_sep-frq_bos406.gif

Figure 20. Channel Separation vs Frequency

7 Detailed Description

7.1 Overview

The OPA376 family belongs to a new generation of low-noise operational amplifiers with e-trim, giving customers outstanding dc precision and ac performance. Low noise, rail-to-rail input and output, and low offset, drawing a low quiescent current, make these devices ideal for a variety of precision and portable applications. In addition, this device has a wide supply range with excellent PSRR, making it a suitable option for applications that are battery-powered without regulation.

7.2 Functional Block Diagram

7.3 Feature Description

The OPAx376 family of precision amplifiers offers excellent dc performance as well as excellent ac performance. Operating from a single power-supply the OPAx376 is capable of driving large capacitive loads, has a wide input common-mode voltage range, and is well-suited to drive the inputs of SAR ADCs as well as 24-bit and higher resolution converters. Including internal ESD protection, the OPAx376 family is offered in a variety of industry-standard packages, including a wafer chip-scale package for applications that require space savings.

7.3.1 Operating Voltage

The OPA376 family of amplifiers operates over a power-supply range of 2.2 V to 5.5 V (±1.1 V to ±2.75 V). Many of the specifications apply from –40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the Typical Characteristics.

7.3.2 Input Offset Voltage and Input Offset Voltage Drift

The OPAx376 family of operational amplifiers is manufactured using TI's e-trim technology. Each amplifier is trimmed in production, thereby minimizing errors associated with input offset voltage and input offset voltage drift. The e-trim technology is a TI proprietary method of trimming internal device parameters during either wafer probing or final testing.

7.3.3 Capacitive Load and Stability

The OPA376 series of amplifiers may be used in applications where driving a capacitive load is required. As with all op amps, there may be specific instances where the OPAx376 can become unstable, leading to oscillation. The particular op amp circuit configuration, layout, gain, and output loading are some of the factors to consider when establishing whether an amplifier will be stable in operation. An op amp in the unity-gain (+1-V/V) buffer configuration and driving a capacitive load exhibits a greater tendency to be unstable than an amplifier operated at a higher noise gain. The capacitive load, in conjunction with the op amp output resistance, creates a pole within the feedback loop that degrades the phase margin. The degradation of the phase margin increases as the capacitive loading increases.

The OPAx376 in a unity-gain configuration can directly drive up to 250 pF of pure capacitive load. Increasing the gain enhances the ability of the amplifier to drive greater capacitive loads; see the typical characteristic Figure 16. In unity-gain configurations, capacitive load drive can be improved by inserting a small (10-Ω to 20-Ω) resistor, R_S, in series with the output, as shown in Figure 22. This resistor significantly reduces ringing while maintaining dc performance for purely capacitive loads. However, if there is a resistive load in parallel with the capacitive load, a voltage divider is created, introducing a gain error at the output and slightly reducing the output swing. The error introduced is proportional to the ratio R_S / R_L, and is generally negligible at low output current levels.

OPA376 OPA2376 OPA4376 ai_cap_load_drive_bos406.gif

Figure 22. Improving Capacitive Load Drive

7.3.4 Common-Mode Voltage Range

The input common-mode voltage range of the OPA376 series extends 100 mV beyond the supply rails. The offset voltage of the amplifier is very low, from approximately (V^–) to (V⁺) – 1 V, as shown in Figure 23. The offset voltage increases as common-mode voltage exceeds (V⁺) –1 V. Common-mode rejection is specified from (V^–) to (V⁺) – 1.3 V.

OPA376 OPA2376 OPA4376 ai_offset_cm_volt_bos406.gif

Figure 23. Offset and Common-Mode Voltage

7.3.5 Input and ESD Protection

The OPA376 family incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case of input and output pins, this protection primarily consists of current steering diodes connected between the input and power-supply pins. These ESD protection diodes also provide in-circuit, input overdrive protection, as long as the current is limited to 10 mA as stated in the Absolute Maximum Ratings. Figure 24 shows how a series input resistor may be added to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and its value should be kept to a minimum in noise-sensitive applications.

OPA376 OPA2376 OPA4376 ai_input_cur_bos406.gif

Figure 24. Input Current Protection

7.4 Device Functional Modes

The OPAx376 has a single functional mode and is operational when the power-supply voltage is greater than 2.2 V (±1.1 V). The maximum power supply voltage for the OPAx376 is 5.5 V (±2.75 V).