OPA55x High-Voltage, High-Current Operational Amplifiers
- SBOS100B July 1999 – January 2016 OPA551 , OPA552
  
  PRODUCTION DATA.

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DATA SHEET

OPA55x High-Voltage, High-Current Operational Amplifiers

1 Features

Wide Supply Range: ±4 V to ±30 V
High Output Current: 200 mA Continuous
Low Noise: 14 nV/√Hz
Fully Protected:
- Thermal Shutdown
- Output Current-Limited
Thermal Shutdown Indicator
Wide Output Swing: 2 V from Rail
Fast Slew Rate:
- OPA551: 15 V/µs
- OPA552: 24 V/µs
Wide Bandwidth:
- OPA551: 3 MHz
- OPA552: 12 MHz
Packages: PDIP-8, SOIC-8, or DDPAK/TO-263-7

2 Applications

Telephony
Test Equipment
Audio Amplifiers
Transducer Excitation
Servo Drivers

3 Description

The OPA551x devices are low-cost operational amplifiers with high-voltage (60-V) and high-current (200-mA) capability.

The OPA551 is unity-gain stable and features high slew rate (15 V/µs) and wide bandwidth (3 MHz). The OPA552 is optimized for gains of 5 or greater, and offers higher speed with a slew rate of 24 V/µs and a bandwidth of 12 MHz. Both devices are suitable for telephony, audio, servo, and test applications.

These laser-trimmed, monolithic integrated circuits provide excellent low-level accuracy along with high output swing. High performance is maintained as the amplifier swings to its specified limits.

The OPA55x devices are internally protected against overtemperature conditions and current overloads. The thermal shutdown indicator flag provides a current output to alert the user when thermal shutdown has occurred.

The OPA55x devices are available in PDIP-8 and SOIC-8 packages, as well as a DDPAK-7/TO-263 surface-mount plastic power package. They are specified for operation over the extended industrial temperature range, –40°C to +125°C.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
OPA55x	PDIP (8)	9.81 mm × 6.35 mm
	SOIC (8)	4.9 mm × 3.91 mm
	DDPAK/TO-263 (7)	10.1 mm × 8.99 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Functional Diagram

OPA551 OPA552 pg_1_graphic_new_bos100.gif

4 Revision History

Changes from A Revision (October 2003) to B Revision

Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go
Changed package references throughout document: SO-8 to SOIC-8 and DDPAK-7 to DDPAK-7/TO-263 Go
Deleted lead temperature specifications from Absolute Maximum Ratings table Go
Deleted charged-device model (CDM) specification from ESD Ratings table Go

5 Pin Configuration and Functions

OPA551, OPA552 P Package

8-Pin PDIP

Top View

OPA551, OPA552 D Package

8-Pin SOIC

Top View

OPA551, OPA552 KTW Package

7-Pin DDPAK/TO-263 Surface-Mount

Top View

OPA551 OPA552 DDPAK_7_surface_mount_sbos100.gif

NOTE:

Tab is connected to V– supply.

Pin Functions

PIN				I/O	DESCRIPTION
NAME	SOIC	PDIP	DDPAK/ TO-263	I/O	DESCRIPTION
Flag	8	8	7	O	Thermal shutdown indicator
+IN	3	3	1	I	Noninverting input
–IN	2	2	2	I	Inverting input
NC	—	1, 5	3	—	No internal connection (can be left floating)
Out	6	6	6	O	Output
Tab	—	—	Tab	—	Connect to V– supply
V+	7	7	5	—	Positive (highest) power supply
V–	1, 4, 5	4	4	—	Negative (lowest) power supply

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

	MIN	MAX	UNIT
Supply, V_S = (V+) to (V–)		60	V
Input voltage range, V_IN	(V–) – 0.5	(V+) + 0.5	V
Output	See SOA Curve (Safe Operating Area)
Operating temperature, T_A	–55	125	°C
Junction temperature, T_J		150	°C
Storage temperature, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±3000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_S	Supply voltage	8 (±4)	60 (±30)	V
	Specified temperature	–40	125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		OPA551, OPA552			UNIT
		D (SOIC)	P (PDIP)	KTW (DDPAK/TO-263)
		8 PINS	8 PINS	7 PINS
R_θJA	Junction-to-ambient thermal resistance	96.7	44.1	22.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	38.7	31.8	34.7	°C/W
R_θJB	Junction-to-board thermal resistance	38.2	21.4	7.7	°C/W
ψ_JT	Junction-to-top characterization parameter	3.7	9.1	3.3	°C/W
ψ_JB	Junction-to-board characterization parameter	37.5	21.2	7.7	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	—	—	0.6	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: V_S = ±30 V

At T_J = 25°C⁽¹⁾, R_L = 3 kΩ connected to ground, and V_OUT = 0 V, unless otherwise noted.

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
OFFSET VOLTAGE
V_OS	Input offset voltage		V_CM = 0 V, I_O = 0 mA		±1	±3	mV
V_OS	Input offset voltage		T_J = –40°C to 125°C			±5	mV
dV_OS /dT	Input offset voltage vs temperature		T_J = –40°C to 125°C		±7		µV/°C
PSRR	Input offset voltage vs power supply		V_S = ±4 V to ±30 V, V_CM = 0 V		10	30	µV/V
INPUT BIAS CURRENT
I_B	Input bias current				±20	±100	pA
I_OS	Input offset current				±3	±100	pA
NOISE
e_n	Input voltage noise density		f = 1 kHz		14		nV/√Hz
i_n	Current noise density		f = 1 kHz		3.5		fA/√Hz
INPUT VOLTAGE RANGE
V_CM	Common-mode voltage range			(V–) + 2.5		(V+) – 2.5	V
CMRR	Common-mode rejection ratio		–27.5 V < V_CM < +27.5 V	92	102		dB
INPUT IMPEDANCE
	Differential				10¹³ \|\| 2		Ω \|\| pF
	Common-mode				10¹³ \|\| 6		Ω \|\| pF
OPEN-LOOP GAIN
A_OL	Open-loop voltage gain		R_L = 3 kΩ, –28 V < V_O < +28 V	110	126		dB
			R_L = 3 kΩ, –28 V < V_O < +28 V, T_J= –40°C to 125°C	100
			R_L = 300 Ω, –27 V < V_O < +27 V		120
OPA551 FREQUENCY RESPONSE
GBW	Gain-bandwidth product				3		MHz
SR	Slew rate		G = 1		±15		V/µs
	Settling time	0.1%	G = 1, C_L = 100 pF, 10-V Step		1.3		µs
	Settling time	0.01%	G = 1, C_L = 100 pF, 10-V Step		2		µs
THD+N	Total harmonic distortion + noise		f = 1 kHz, V_O = 15 V_RMS, R_L = 3 kΩ, G = 3		0.0005%
THD+N	Total harmonic distortion + noise		f = 1 kHz, V_O = 15 V_RMS, R_L = 300 kΩ, G = 3		0.0005%
	Overload recovery time		V_IN × Gain = V_S		1		µs
OPA552 FREQUENCY RESPONSE
GBW	Gain-bandwidth product				12		MHz
SR	Slew rate		G = 5		±24		V/µs
	Settling time	0.1%	G = 5, C_L = 100 pF, 10-V Step		2.2		µs
	Settling time	0.01%	G = 5, C_L = 100 pF, 10-V Step		3		µs
THD+N	Total harmonic distortion + noise		f = 1 kHz, V_O = 15 V_RMS, R_L = 3 kΩ, G = 5		0.0005%
THD+N	Total harmonic distortion + noise		f = 1 kHz, V_O = 15 V_RMS, R_L = 300 kΩ, G = 5		0.0005%
	Overload recovery time		V_IN × Gain = V_S		1		µs
OUTPUT
V_OUT	Voltage output		I_O = 200 mA	(V–) + 3		(V+) – 3	V
			I_O = 200 mA T_J= –40°C to 125°C	(V–) + 3.5		(V+) – 3.5
			I_O = 10 mA	(V–) + 2		(V+) – 2
			I_O = 10 mA T_J= –40°C to 125°C	(V–) + 2.5		(V+) – 2.7
I_O	Maximum continuous current output: DC		Package dependent — see Power Dissipation section	±200			mA
I_SC	Short-circuit current				±380		mA
C_LOAD	Capacitive load drive		Stable operation	See Figure 19
SHUTDOWN FLAG
	Thermal shutdown status output		Normal operation, sourcing		0.05	1	µA
			Thermal shutdown, sourcing	80	120	160	µA
			Voltage compliance range	V–		(V+) –1.5	V
	Junction temperature		Shutdown		160		°C
	Junction temperature		Reset from shutdown		140		°C
POWER SUPPLY
V_S	Specified voltage				±30		V
	Operating voltage range			±4		±30	V
I_Q	Quiescent current		I_O = 0 mA		±7	±8.5	mA
I_Q	Quiescent current		T_J= –40°C to 125°C			±10	mA
TEMPERATURE RANGE
T_J	Specified range			–40		125	°C
T_J	Operating range			–55		125	°C

(1) All tests are high-speed tested at 25°C ambient temperature. Effective junction temperature is 25°C unless otherwise noted.

6.6 Typical Characteristics

At T_J = 25°C, V_S = ±30 V and R_L = 3 kΩ, unless otherwise noted.

Figure 1. Open-Loop Gain and Phase vs Frequency (OPA551)

Figure 3. Common-Mode Rejection Ratio vs Frequency

Figure 5. Input Voltage and Current Noise Spectral Density
vs Frequency

Figure 7. Maximum Output Voltage Swing vs Frequency

Figure 9. Open-Loop Gain, Power-Supply Rejection Ratio,
and Common-Mode Rejection Ratio vs Temperature

Figure 11. Quiescent Current and Short-Circuit Current
vs Temperature

Figure 13. Slew Rate vs Temperature

Figure 15. Quiescent Current and Short-Circuit Current
vs Supply Voltage

Figure 17. Offset Voltage Drift Production Distribution

Figure 19. Small-Signal Overshoot
vs Load Capacitance

G = 1, C_L = 100 pF

Figure 21. Large-Signal Step Response
OPA552

G = 1, C_L = 100 pF

Figure 23. Small-Signal Step Response
OPA552

Figure 2. Open-Loop Gain and Phase vs Frequency (OPA552)

Figure 4. Power-Supply Rejection Ratio vs Frequency

Figure 6. Total Harmonic Distortion + Noise vs Frequency

Figure 8. Output Voltage Swing vs Output Current

Figure 10. Input Bias Current and Input Offset Current
vs Temperature

Figure 12. Gain Bandwidth Product vs Temperature

Figure 14. Input Bias Current and Input Offset Current
vs Common-Mode Voltage

Figure 16. Offset Voltage Production Distribution

Figure 18. Settling Time vs Closed-Loop Gain

	G = 1, C_L = 100 pF

Figure 20. Large-Signal Step Response
OPA551

G = 1, C_L = 100 pF

Figure 22. Small-Signal Step Response
OPA551

G = 1, C_L = 1000 pF

Figure 24. Small-Signal Step Response
OPA551

7 Detailed Description

7.1 Overview

The OPA55x devices are low-cost, laser-trimmed, operational amplifiers that feature outstanding low-level accuracy coupled with high output swing. High device performance is maintained as these amplifiers swing to the specified device limits in a wide range of applications. The OPA551 is unity-gain stable while the OPA552 is optimized for gains of 5 or greater.

7.2 Functional Block Diagram

7.3 Feature Description

Thermal Shutdown

Internal thermal shutdown circuitry shuts down the output when the die temperature reaches approximately 160°C and resets when the die has cooled to 140°C. The flag pin can be monitored to determine if shutdown has occurred. During normal operation, the current source from the flag pin is less than 50 nA. During shutdown, the flag pin sources 120 µA (typical).

7.3.1 Current Limit

The OPA55x devices are designed with internal current-limiting circuitry that limits the output current to approximately 380 mA. The current limit varies with increasing junction temperature as shown in (Figure 11). This feature, in combination with the thermal protection circuitry, provides protection from many types of overload conditions, including short-circuit to ground.

7.3.2 Input Protection

The OPA55x features internal clamp diodes to protect the inputs when voltages beyond the supply rails are encountered. However, input current must be limited to 5 mA. In some cases, an external series resistor may be required. Many input signals are inherently current-limited; therefore, a limiting resistor may not be required. Consider that a large series resistor, in conjunction with the input capacitance, can affect stability.

7.3.3 Thermal Protection

The OPA55x has thermal shutdown circuitry that protects the amplifier from damage caused by overload conditions. The thermal protection circuitry disables the output when the junction temperature reaches approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is automatically re-enabled.

The thermal shutdown function is not intended to replace proper heat sinking. Activation of the thermal shutdown circuitry is an indication of excessive power dissipation or an inadequate heat sink. Continuously running the amplifier into thermal shutdown can degrade reliability.

The thermal shutdown indicator (flag) pin can be monitored to determine if shutdown is occurring. During normal operation, the current output from the flag pin is typically 50 nA. During shutdown, the current output from the flag pin increases to 120 μA (typical). This current output allows for easy interfacing to external logic. Refer to Figure 25 and Figure 26 for two examples that implement this function.

OPA551 OPA552 thermal_shutdown_indicator_sbos100_HCT.gif

HCT logic has relatively well-controlled logic level. A properly chosen resistor value can ensure proper logic high level throughout the full range of flag output current.

Figure 25. Interfacing With HCT Logic

OPA551 OPA552 thermal_shutdown_indicator_sbos100_CMOS.gif

Interface to virtually any CMOS logic gate by choosing resistor value that provides a guaranteed logic high voltage with the minimum (80 µA) flag current. A diode clamp to the logic supply voltage assures that the CMOS is not damaged by overdrive.

Figure 26. Interfacing With CMOS Logic

7.4 Device Functional Modes

The OPA551 and OPA552 have a single functional mode. The device is operational when the power supply is above 8 V and the junction temperature is below 160°C.