SBOS567A June 2011 – February 2024 OPA564-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The OPA564-Q1 uses the HSOIC-20 PowerPAD integrated circuit package (DWP), a thermally-enhanced, standard size integrated-circuit (IC) package. This package enhances power dissipation capability significantly. This package is easily mounted using standard printed circuit board (PCB) assembly techniques, and can be removed and replaced using standard repair procedures.
Figure 8-15 shows how DWP package is designed so that the leadframe die pad (or thermal pad) is exposed on the bottom of the IC. The thermal pad provides an extremely low thermal resistance (θJC) path between the die and the exterior of the package.
The PowerPAD integrated circuit package with exposed pad down are designed to be soldered directly to the PCB, using the PCB as a heat sink. Texas Instruments does not recommend the use of the PowerPAD integrated circuit package without soldering the package to the PCB because of the risk of lower thermal performance and mechanical integrity. In addition, through the use of thermal vias, the bottom-side thermal pad can be directly connected to a power plane or special heat-sink structure designed into the PCB. Ensure that the thermal pad is at the same voltage potential as V–. Always solder the bottom-side thermal pad to the PCB, even with applications that have low power dissipation. The solder provides the necessary thermal and mechanical connection between the leadframe die and the PCB.