SBOS223H December   2001  – October 2024 OPA690

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics OPA690IDBV, VS = ±5 V
    6. 6.6  Electrical Characteristics OPA690IDBV, VS = 5 V
    7. 6.7  Electrical Characteristics OPA690ID, VS = ±5 V
    8. 6.8  Electrical Characteristics OPA690ID, VS = 5 V
    9. 6.9  Typical Characteristics: OPA690IDBV, VS = ±5V
    10. 6.10 Typical Characteristics: OPA690IDBV, VS = 5V
    11. 6.11 Typical Characteristics: OPA690ID, VS = ±5V
    12. 6.12 Typical Characteristics: OPA690ID, VS = 5V
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wideband Voltage-Feedback Operation
      2. 7.3.2 Input and ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Disable Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bandwidth Versus Gain: Noninverting Operation
      2. 8.1.2 Inverting Amplifier Operation
      3. 8.1.3 Optimizing Resistor Values
      4. 8.1.4 Output Current and Voltage
      5. 8.1.5 Driving Capacitive Loads
      6. 8.1.6 Distortion Performance
      7. 8.1.7 Noise Performance
      8. 8.1.8 DC Accuracy and Offset Control
      9. 8.1.9 Thermal Analysis
    2. 8.2 Typical Applications
      1. 8.2.1 High-Performance DAC Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Single-Supply Active Filters
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Application Curve
      3. 8.2.3 High-Power Line Driver
        1. 8.2.3.1 Design Requirements
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Macromodels and Applications Support
      2. 9.1.2 Demonstration Fixtures
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DBV|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.9 Thermal Analysis

As a result of the high output power capability of the OPA690, sinking heat or forced airflow can be required under extreme operating conditions. Maximum desired junction temperature sets the maximum allowed internal power dissipation. In no case can the maximum junction temperature be allowed to exceed 150°C.

Operating junction temperature (TJ) is given by TA + PD × RθJA. The total internal power dissipation (PD) is the sum of quiescent power (PDQ) and additional power dissipated in the output stage (PDL) to deliver load power. Quiescent power is simply the specified no-load supply current times the total supply voltage across the part. PDL depends on the required output signal and load but, for a grounded resistive load, be at a maximum when the output is fixed at a voltage equal to 1/2 of either supply voltage (for equal bipolar supplies) under the condition in Equation 3.

Equation 3. PDL = VS2 / (4 × RL)

where

  • RL includes feedback network loading
Note:

The power in the output stage and not into the load determines internal power dissipation.

As a worst-case example, compute the maximum TJ using an OPA690-DBV (6-pin SOT-23 package) in the circuit of Figure 7-1 operating at the maximum specified ambient temperature of 85°C and driving a grounded
20-Ω load.

Equation 4. PD = 10 V × 6.2 mA + 52 / (4 × (20 Ω || 804 Ω)) = 382 mW
Equation 5. Maximum TJ = 85°C + (0.38 W × 150°C/W) = 142°C

Although this result is still much less than the specified maximum junction temperature, system reliability considerations can require lower tested junction temperatures. The highest possible internal dissipation occurs if the load requires current to be forced into the output for positive output voltages or sourced from the output for negative output voltages. This puts a high current through a large internal voltage drop in the output transistors. Figure 6-55, the output V-I plot shown in Section 6.11, include a boundary for 1-W maximum internal power dissipation under these conditions.