SBOS293I December   2003  – October 2024 OPA695

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics VS = ±5 V, OPA695ID, OPA695IDBV
    6. 5.6  Electrical Characteristics VS = 5 V, OPA695ID, OPA695IDBV
    7. 5.7  Electrical Characteristics VS = ±5 V, OPA695IDGK
    8. 5.8  Electrical Characteristics VS = 5 V, OPA695IDGK
    9. 5.9  Typical Characteristics: VS = ±5 V, OPA695IDBV, OPA695ID
    10. 5.10 Typical Characteristics: VS = 5 V, OPA695IDBV, OPA695ID
    11. 5.11 Typical Characteristics: VS = ±5 V, OPA695IDGK
    12. 5.12 Typical Characteristics: VS = 5 V, OPA695IDGK
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Wideband Current-Feedback Operation
      2. 6.3.2 Input and ESD Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Operating Suggestions
        1. 7.1.1.1 Setting Resistor Values to Optimize Bandwidth
        2. 7.1.1.2 Output Current and Voltage
        3. 7.1.1.3 Driving Capacitive Loads
        4. 7.1.1.4 Distortion Performance
        5. 7.1.1.5 Noise Performance
        6. 7.1.1.6 Thermal Analysis
      2. 7.1.2 LO Buffer Amplifier
      3. 7.1.3 Wideband Cable Driving Applications
        1. 7.1.3.1 Cable Modem Return Path Driver
        2. 7.1.3.2 Arbitrary Waveform Driver
      4. 7.1.4 Differential I/O Applications
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Saw Filter Buffer
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Design-In Tools
        1. 8.1.1.1 Demonstration Fixtures
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DBV|6
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Electrical Characteristics VS = 5 V, OPA695ID, OPA695IDBV

at TA = +25°C, G = +8 V/V, RF = 348 Ω, and RL = 100 Ω to VS /2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth VO = 0.5 VPP G = +1 V/V, RF = 511Ω 1200 MHz
G = +2 V/V, RF = 487Ω 700
G = +8 V/V, RF = 348Ω 500
G = +16 V/V, RF = 162Ω 410
Bandwidth for 0.2-dB gain flatness VO = 0.5 VPP, G = +2 V/V, RF = 487 Ω 110 MHz
Peaking at a gain of +1 V/V VO = 0.5 VPP, RF = 511 Ω 2.2 dB
LSBW Large-signal bandwidth VO = 2 VPP, G = +8 V/V 430 MHz
SR Slew rate VO = 2-V step, G = +8 V/V 2500 V/μs
Rise and fall time G = +8 V/V VO = 0.5-V step 0.7 ns
VO = 2-V step 0.8
Settling time to 0.5% VO = 2-V step. G = +8 V/V 10 ns
HD2 2nd-order harmonic distortion f = 10 MHz VO = 2 VPP, RL = 100 Ω –69 dBc
VO = 2 VPP, RL = 500 Ω –68
HD3 3rd- order harmonic distortion f = 10 MHz VO = 2 VPP, RL = 100 Ω –62 dBc
VO = 2 VPP, RL = 500 Ω –63
en Input voltage noise f > 1 MHz 1.9 nV/√Hz
in+ Noninverting input current noise f > 1 MHz 14 pA/√Hz
in- Inverting input current noise f > 1 MHz 22 pA/√Hz
DC PERFORMANCE
ZOL Open-loop transimpedance gain 40 250 kΩ
TA = –40°C to +85°C 36
VOS Input offset voltage VCM = VS/2 ±0.3 ±3 mV
TA = –40°C to +85°C ±4
Average input offset voltage drift VCM = VS/2, TA = –40°C to +85°C ±4 ±15 μV/°C
Noninverting input bias current VCM = VS/2 15 ±40 μA
TA = –40°C to +85°C ±50
Average noninverting input bias current drift VCM = VS/2, TA = –40°C to +85°C 60 ±170 nA/°C
Inverting input bias current VCM = VS/2 ±5 ±60 μA
TA = –40°C to +85°C ±70
Average inverting input bias current drift VCM = VS/2, TA = –40°C to +85°C ±16 ±160 nA/°C
INPUT CHARACTERISTICS
CMIR Common-mode input range (positive) 3.2 3.4 V
TA = –40°C to +85°C 3.1
Common-mode input range (negative) 1.6 1.8
TA = –40°C to +85°C 1.9
CMRR Common-mode rejection ratio VCM = VS/2 51 65 dB
TA = –40°C to +85°C 50
Noninverting input resistance 250 || 2 kΩ || pF
Inverting input resistance Open-loop 21 Ω
OUTPUT CHARACTERISTICS
VO Output voltage swing (most positive) No load 3.95 4.05 V
TA = –40°C to 85°C 3.75
Output voltage swing (least positive) No load 0.9 1.05
TA = –40°C to +85°C 1.25
IO Output current, sourcing VO = VS/2 70 100 mA
TA = –40°C to +85°C 66
Output current, sinking VO = VS/2 –100 –70
TA = –40°C to +85°C –60
ZOUT Closed-loop output impedance G = +2 V/V, f = 100 kHz 0.02 Ω
POWER SUPPLY
IQ Quiescent current 10.9 13 14.4 mA
TA = –40°C to +85°C 9.1 17.1
–PSRR Negative power-supply rejection ratio 69 dB
DISABLE (Disabled LOW)
Power-down quiescent current (+VS) VDIS   = 0 V 120 160 μA
TA = –40°C to +85°C 180
Disable time VIN = ±0.25 VDC 5 μs
Enable time VIN = ±0.25 VDC 80 ns
Off isolation G = +8 V/V, f = 10 MHz 70 dB
Output capacitance in disable 2.5 pF
Enable voltage threshold 3.1 3.5 V
TA = –40°C to +85°C 3.7
Disable voltage threshold 1.7 2.4 V
TA = –40°C to +85°C 1.5
DIS control pin input bias current 95 130 μA
TA = –40°C to +85°C 149