SBOSA14A April   2023  – November 2023 OPA814

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics:
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 FET-Input Architecture With Wide Gain-Bandwidth Product
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, High-Input Impedance DAQ Front-End
      2. 8.1.2 Wideband, Transimpedance Design Using the OPA814
    2. 8.2 Typical Application
      1. 8.2.1 High-Input-Impedance, 180-MHz, Digitizer Front-End Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.1 Design Requirements

Table 8-1 lists the design requirements for a high-input-impedance, 180-MHz, digitizer front-end amplifier.

Table 8-1 Design Requirements
PARAMETER VALUE
Input impedance 1 MΩ or 50 Ω
Input range 1-MΩ setting 20 VPP
50-Ω setting 2 VPP
Offset drift 3.5 µV/°C, maximum
Noise at highest resolution (50-Ω Input) 90 µVRMS