SBOS940A May   2019  – March 2020 OPA818

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     High-Speed Optical Front-End
  3. 3 Description
    1.     Photodiode Capacitance vs 3-dB Bandwidth
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V
    7. 7.7 Typical Characteristics: VS = 6 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 8.3.4 Low Input Capacitance
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 8.4.2 Single-Supply Operation (6 V to 13 V)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Wideband, Non-Inverting Operation
      2. 9.1.2 Wideband, Transimpedance Design Using OPA818
    2. 9.2 Typical Applications
      1. 9.2.1 High Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Non-Inverting Gain of 2 V/V
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics: VS = ±5 V

At TA ≈ 25°C, VS+ = +5 V, VS– = –5 V, closed-loop gain (G) = 7 V/V, common-mode voltage (VCM) = mid-supply, RF = 301 Ω, RL = 100 Ω to mid-supply (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth VO = 100 mVPP 765 MHz
G = 10, VO = 100 mVPP 430
Frequency response peaking 1.4 dB
LSBW Large-signal bandwidth VO = 2 VPP 400 MHz
GBWP Gain-bandwidth product G = 101 V/V, VO = 100 mVPP, RF = 3.01 kΩ 2700 MHz
Bandwdith for 0.1dB flatness VO = 100 mVPP 100 MHz
SR Slew rate (20%-80%) VO = 4-V step, rising and falling 1400 V/µs
VO = 4-V step, rising and falling, G = 10 1340 V/µs
tr/tf Rise and fall time (10%-90%) VO = 100-mV step 0.52 ns
tS Settling time to 0.1% VO = 2-V step 5.7 ns
Overshoot and undershoot VO = 2-V step 7%
Overdrive recovery time VO = (VS– – 1 V) to (VS+ + 1 V) 25 ns
HD2 Second-order harmonic distortion VO = 2 VPP f = 1 MHz –84 dBc
f = 10 MHz –64
f = 50 MHz –52
f = 10 MHz, RL = 1 kΩ –71
HD3 Third-order harmonic distortion VO = 2 VPP f = 1 MHz –106 dBc
f = 10 MHz –99
f = 50 MHz –74
f = 10 MHz, RL = 1 kΩ –82
en Input voltage noise f ≥ 150 kHz 2.2 nV/√Hz
1/f corner 15 kHz
in Input current noise f = 10 kHz 3 fA/√Hz
f = 1 MHz 145 fA/√Hz
ZCL Closed-loop output impedance f = 10 MHz 0.2 Ω
DC PERFORMANCE
AOL Open-loop voltage gain f = DC, VO = ±2 V 85 92 dB
VOS Input offset voltage ±0.35 ±1.25 mV
TA = –40°C to +85°C ±1.8
Input offset voltage drift(1) TA = –40°C to +85°C ±3 ±20 µV/°C
IB Input bias current(2) ±4 ±25 pA
TA = –40°C to +85°C 700
IOS Input offset current(2) ±1 ±25 pA
CMRR Common-mode rejection ratio f = DC, VCM = ±0.5 V 73 90 dB
f = DC, VCM = ±0.5 V, TA = –40°C to +85°C 70 dB
Internal feedback trace resistance Device turned OFF, OUT to FB pin resistance 0.8 1.2 1.7 Ω
INPUT
Common-mode input impedance 500 || 1.9 GΩ || pF
Differential input impedance 500 || 0.5 GΩ || pF
Most positive input voltage(3) VS+ – 3.6 VS+ – 3.2 V
Most negative input voltage(3) VS– VS– + 0.25 V
ΔVOS at most positive input voltage(4) VCM = VS+ – 3.6 V ±0.03 ±1 mV
VCM = VS+ – 3.6 V, TA = -40°C to +85°C ±1.5 mV
ΔVOS at most negative input voltage(4) VCM = VS– + 0.25 V ±0.23 ±1 mV
VCM = VS– + 0.25 V, TA = -40°C to +85°C ±1.5 mV
OUTPUT
VOH Output voltage swing high VS+ – 1.2 VS+ – 1 V
TA = –40°C to +85°C VS+ – 1.3 V
RL = 1 kΩ VS+ – 1 VS+ – 0.9 V
RL = 1 kΩ, TA = –40°C to +85°C VS+ – 1.2 V
VOL Output voltage swing low VS– + 1.2 VS– + 1.33 V
TA = –40°C to +85°C VS– + 1.4 V
RL = 1 kΩ VS– + 1.1 VS– + 1.2 V
RL = 1 kΩ, TA = –40°C to +85°C VS– + 1.3 V
IO_MAX Linear output drive VO = ±2.75 V, RL to mid-supply = 50 Ω,
[ΔVOS from no-load VOS] ≤ ±1 mV		 ±55 mA
VO = ±2.5 V, RL to mid-supply = 50 Ω,
[ΔVOS from no-load VOS] ≤ ±1 mV,
TA = –40°C to +85°C		 ±50 mA
ISC Output short-circuit current ±110 mA
POWER SUPPLY
VS Single-supply operating range 6 10 13 V
IQ Quiescent current per channel No load 26.5 27.7 29 mA
No load, TA = –40°C to +85°C 23 31.5 mA
IQ drift No load, TA = –40°C to +85°C 42 µA/°C
PSRR+ Positive power supply rejection ratio ΔVS+ = ±0.25 V 75 95 dB
ΔVS+ = ±0.25 V, TA = –40°C to +85°C 70 dB
PSRR– Negative power supply rejection ratio ΔVS– = ±0.25 V 80 94 dB
ΔVS– = ±0.25 V, TA = –40°C to +85°C 74 dB
POWER DOWN
VTH_EN Enable voltage threshold Power on when PD > VTH_EN, No Load VS+ – 1 V
VTH_DIS Disable voltage threshold Power down when PD < VTH_DIS, No Load VS+ – 3 V
Power-down IQ (VS+) No Load 27 40 µA
PD pin bias current(2) No load, PD = VS+ –3 –2 µA
No load, PD = VS– 13 20 µA
Turn-on time delay 125 ns
Turn-off time delay 170 ns
(1) Input offset voltage drift and input bias current drift are average values calculated by taking data at the end-points, computing the difference, and dividing by the temperature range.
(2) Current is considered positive out of the pin. IOS = IB+ – IB–.
(3) Defined by ΔVOS at most positive/negative input voltage specification
(4) ΔVOS = |VOS at specified VCM – VOS at 0 V VCM|