To implement a controlled frequency response transimpedance design, set the transimpedance stage amplifier bandwidth higher than a controlled post RC filter. This allows variation in the source capacitance and amplifier gain bandwidth product with less overall bandwidth variation to the final output. In this example design:

• Assume a nominal source capacitance value of 100 pF. This normally comes from the capacitance versus reverse bias plot for the photodiode. No reverse bias is illustrated in Figure 8-8, but the current source is typically a back biased diode with a negative supply on the anode and the cathode connected to the op amp inverting input. In this polarity, the signal current sinks into the diode and raises the op amp output voltage above ground.
• For the best dc precision, add a matching resistor on the noninverting input to reduce the input bias current error to I_OS × R_F. This resistor adds to the input voltage noise; TI recommends bypassing that resistor with as large as a capacitor as required to roll off resistor noise. This capacitor has a relatively low frequency self resonance that interacts with the input stage and can impair stability. Add a small series 20‑Ω resistor from the capacitor into the noninverting input to de-Q the resonant source impedance without adding too much noise.
• Set the feedback capacitor to achieve the desired frequency response shape.
• Add a post RC filter to control the overall bandwidth to 1 MHz. In this example, a 2.2‑nF capacitor allows a low 73.2‑Ω series resistor. When driving a sampling ADC (like a SAR), this combination helps reduce the sampling glitch and speed settling time.