SBOSA57B February   2021  – January 2023 OPA855-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input and ESD Protection
      2. 9.3.2 Feedback Pin
      3. 9.3.3 Wide Gain-Bandwidth Product
      4. 9.3.4 Slew Rate and Output Stage
    4. 9.4 Device Functional Modes
      1. 9.4.1 Split-Supply and Single-Supply Operation
      2. 9.4.2 Power-Down Mode
  10. 10Application, Implementation, and Layout
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Typical Application
      1. 10.3.1 Design Requirements
      2. 10.3.2 Detailed Design Procedure
      3. 10.3.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.2 Detailed Design Procedure

The closed-loop bandwidth of a transimpedance amplifier is a function of the following:

  1. The total input capacitance (CIN). This total includes the photodiode capacitance, the input capacitance of the amplifier (common-mode and differential capacitance) and any stray capacitance from the PCB.
  2. The op amp gain bandwidth product (GBWP).
  3. The transimpedance gain (RF).

Figure 10-1 shows the OPA855-Q1 configured as a TIA, with the avalanche photodiode (APD) reverse biased so that the APD cathode is tied to a large positive bias voltage. In this configuration, the APD sources current into the op amp feedback loop so that the output swings in a negative direction relative to the input common-mode voltage. To maximize the output swing in the negative direction, the OPA855-Q1 common-mode voltage is set close to the positive limit; only 1.2 V from the positive supply rail. The feedback resistance (RF) and the input capacitance (CIN) form a zero in the noise gain that results in instability if left unchecked. To counteract the effect of the zero, a pole is inserted into the noise gain transfer function by adding the feedback capacitor (CF).

The Transimpedance Considerations for High-Speed Amplifiers Application Report discusses theories and equations that show how to compensate a transimpedance amplifier for a particular transimpedance gain and input capacitance. The bandwidth and compensation equations from the application report are available in an Excel® calculator. What You Need To Know About Transimpedance Amplifiers – Part 1 provides a link to the calculator.

The equations and calculators in the referenced application report and blog posts are used to model the bandwidth (f–3dB) and noise (IRN) performance of the OPA855-Q1 configured as a TIA. The resultant performance is shown in Figure 10-2 and Figure 10-3. The left-side Y-axis shows the closed-loop bandwidth performance, whereas the right side of the graph shows the integrated input-referred noise. The noise bandwidth to calculate IRN for a fixed RF and CPD is set equal to the f–3dB frequency. Figure 10-2 shows the amplifier performance as a function of photodiode capacitance (CPD) for RF = 6 kΩ and 12 kΩ. Increasing CPD decreases the closed-loop bandwidth. To maximize bandwidth, make sure to reduce any stray parasitic capacitance from the PCB. The OPA855-Q1 is designed with 0.8 pF of total input capacitance to minimize the effect of stray capacitance on system performance. Figure 10-3 shows the amplifier performance as a function of RF for CPD = 1.5 pF and 2.5 pF. Increasing RF results in lower bandwidth. To maximize the signal-to-noise ratio (SNR) in an optical front-end system, maximize the gain in the TIA stage. Increasing RF by a factor of X increases the signal level by X, but only increases the resistor noise contribution by √X, thereby improving SNR. Since the OPA855-Q1 is a bipolar input amplifier, increasing the feedback resistance increases the voltage offset due to the bias current and also increases the total output noise due to increased noise contributions from the amplifiers current noise.

The OPA859-Q1 configured as a unity-gain buffer drives a DC offset voltage of 3.25 V into the lower half of the THS4520. To maximize the dynamic range of the ADC, the OPA855-Q1 and OPA859-Q1 drive a differential common-mode of 3.8 V and 3.25 V respectively into the THS4520. The dc offset voltage of the buffer amplifier can be derived using Equation 1.

Equation 1. GUID-0250B685-1308-41B3-B403-F7DE32F9B0D9-low.gif

where

  • VTIA_CM is the common-mode voltage of the TIA (3.8 V)
  • VADC_DIFF_IN is the differential input voltage range of the ADC (1.1 VPP)
  • RF and RG are the feedback resistance (499 Ω) and gain resistance (499 Ω) of the THS4520 differential amplifier

The low-pass filter between the THS4520 and the ADC54J64 minimizes high-frequency noise and maximizes SNR. The ADC54J64 has an internal buffer that isolates the output of the THS4520 from the ADC sampling-capacitor input, so a traditional charge bucket filter is not required.