SBOSAI7B November 2023 – July 2024 OPA2891 , OPA891
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Figure 7-5 shows an equivalent circuit diagram of one of the channels of a multiplexer. CS is the input capacitance of the channel; CD is the output capacitance of the channel. RON is the resistance of the channel when the channel is turned ON. CL and RL are the load capacitance and resistance, respectively. VIN is the input voltage of the source. RS is the resistance of the source. VOUT is the output voltage of the multiplexer.
Settling time is improved when the values of RS, RON, CS, CD, and CL are small, and the value of RL is large.
For TS5A3159:
Typical values for the extrinsic parameters are
For a 16-bit system, at least 18-bit settling is desired to minimize distortion from settling artifacts. For a 18-bit settling, the circuit response time required is (18 × ln2) × TRC = 108ns, which is less than 2MSPS sampling time of 500ns. If the settling time is more than the conversion time of the ADC, the output of the multiplexer does not settle to the required accuracy resulting in distortion.
One more important parameter to consider when selecting a multiplexer is the on-state resistance variation with voltage. This variation also affects distortion because RON and RL act like a resistor divider circuit. Any variation of RON with voltage affects the output voltage.