SBOSA77 Data sheet | TI.com

SBOSA77A March 2023 – April 2024 OPA928

PRODUCTION DATA

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)

D|8

Thermal pad, mechanical data (Package|Pins)

Orderable Information

sbosa77a_oa

5.8 Typical Characteristics

at T_A = 25°C, V_S = 16V, V_GRD = V_CM = V_S / 2, R_L = 10kΩ connected to V_S / 2, and C_L = 100pF (unless otherwise noted)

V_S = 4.5V, T_A = 85°C, I_BN

Figure 5-1 Input Bias Current Production Distribution

V_S = 16V, T_A = 85°C, I_BN, 2126 units

Figure 5-3 Input Bias Current Production Distribution

V_S = 36V, T_A = 85°C, I_BN, 2126 units

Figure 5-5 Input Bias Current Production Distribution

V_S = 16V, T_A = 85°C, 2126 units

Figure 5-7 Input Bias Offset Current Production Distribution

V_S = 4.5V, 650 units

Figure 5-9 Offset Voltage Production Distribution

V_S = 36V, 650 units

Figure 5-11 Offset Voltage Production Distribution

V_S = 16V, T_A = –40°C to +125°C, 34 units

Figure 5-13 Offset Voltage Drift Distribution

V_S = 4.5V, 5 typical units

Figure 5-15 Offset Voltage vs Temperature

V_S = 36V, 5 typical units

Figure 5-17 Offset Voltage vs Temperature

V_S = 16V, 5 typical units

Figure 5-19 Offset Voltage vs Common-Mode Voltage in Transition Region

Figure 5-21 Open-Loop Gain and Phase vs Frequency

V_S = 4.5V, T_A = 25°C

Figure 5-23 Input Bias Current vs Common-Mode Voltage

V_S = 16V, T_A = 25°C

Figure 5-25 Input Bias Current vs Common-Mode Voltage

V_S = 36V, T_A = 25°C

Figure 5-27 Input Bias Current vs Common-Mode Voltage

V_S = 4.5V, RH = 10%

Figure 5-29 Input Bias Current vs Temperature

V_S = 36V, RH = 10%

Figure 5-31 Input Bias Current vs Temperature

V_S = 4.5V, sinking

Figure 5-33 Output Voltage Swing vs Output Current

V_S = 16V, sinking

Figure 5-35 Output Voltage Swing vs Output Current

V_S = 36V, sinking

Figure 5-37 Output Voltage Swing vs Output Current

Figure 5-39 0.1Hz to 10Hz Noise

Figure 5-41 Input Current Noise Spectral Density
vs Frequency

V_S = 4.5V

Figure 5-43 THD+N vs Frequency

V_S = 4.5V

Figure 5-45 THD+N vs Output Amplitude

V_S = 16V

Figure 5-47 THD+N vs Frequency

V_S = 16V

Figure 5-49 THD+N vs Output Amplitude

Figure 5-51 Quiescent Current vs Temperature

Figure 5-53 Open-Loop Output Impedance vs Frequency

G = −1, 10mV output step

Figure 5-55 Small-Signal Overshoot vs Capacitive Load

G = –10V/V

Figure 5-57 Positive Overload Recovery

G = 1, C_L = 10pF, 10mV step

Figure 5-59 Small-Signal Step Response

G = 1, C_L = 10pF, 10mV step

Figure 5-61 Large-Signal Step Response

Gain = 1, C_L = 10pF, 2V step applied at t = 0µs

Figure 5-63 Settling Time

V_S = 4.5V, 650 units

Figure 5-65 Guard Buffer Offset Distribution

V_S = 36V, 650 units

Figure 5-67 Guard Buffer Offset Distribution

V_S = 16V, 34 units

Figure 5-69 Guard Buffer Offset Drift Distribution

V_S = 4.5V, 5 typical units

Figure 5-71 Guard Buffer Offset Voltage vs Temperature

V_S = 16V, 5 typical units

Figure 5-73 Guard Buffer Offset Voltage vs Temperature

V_S = 4.5V, T_A = 85°C, I_BP

Figure 5-2 Input Bias Current Production Distribution

V_S = 16V, T_A = 85°C, I_BP, 2126 units

Figure 5-4 Input Bias Current Production Distribution

V_S = 36V, T_A = 85°C, I_BP, 2126 units

Figure 5-6 Input Bias Current Production Distribution

V_S = 36V, T_A = 85°C, 2126 units

Figure 5-8 Input Bias Offset Current Production Distribution

V_S = 16V, 650 units

Figure 5-10 Offset Voltage Production Distribution

V_S = 4.5V, T_A = –40°C to +125°C, 34 units

Figure 5-12 Offset Voltage Drift Distribution

V_S = 36V, T_A = –40°C to +125°C, 34 units

Figure 5-14 Offset Voltage Drift Distribution

V_S = 16V, 5 typical units

Figure 5-16 Offset Voltage vs Temperature

V_S = 4.5V, 5 typical units

Figure 5-18 Offset Voltage vs Common-Mode Voltage

V_S = 36V, 5 typical units

Figure 5-20 Offset Voltage vs Common-Mode Voltage in Transition Region

Figure 5-22 Closed-Loop Gain vs Frequency

V_S = 4.5V, T_A = 85°C

Figure 5-24 Input Bias Current vs Common-Mode Voltage

V_S = 16V, T_A = 85°C

Figure 5-26 Input Bias Current vs Common-Mode Voltage

V_S = 36V, T_A = 85°C

Figure 5-28 Input Bias Current vs Common-Mode Voltage

V_S = 16V, RH = 10%

Figure 5-30 Input Bias Current vs Temperature

V_S = 4.5V, sourcing

Figure 5-32 Output Voltage Swing vs Output Current

V_S = 16V, sourcing

Figure 5-34 Output Voltage Swing vs Output Current

V_S = 36V, sourcing

Figure 5-36 Output Voltage Swing vs Output Current

Figure 5-38 CMRR and PSRR vs Frequency

Figure 5-40 Input Voltage Noise Spectral Density
vs Frequency

V_S = 4.5V

Figure 5-42 THD+N vs Frequency

V_S = 4.5V

Figure 5-44 THD+N vs Output Amplitude

V_S = 16V

Figure 5-46 THD+N vs Frequency

V_S = 16V

Figure 5-48 THD+N vs Output Amplitude

Figure 5-50 Quiescent Current vs Supply Voltage

Figure 5-52 Open-Loop Gain vs Temperature

G = 1, 10mV output step

Figure 5-54 Small-Signal Overshoot vs Capacitive Load

V_S = 36V

Figure 5-56 No Phase Reversal

G = –10V/V

Figure 5-58 Negative Overload Recovery

G = −1, C_L = 10pF, 10mV step

Figure 5-60 Small-Signal Step Response

G = −1, C_L = 10pF, 10mV step

Figure 5-62 Large-Signal Step Response

Gain = 1, C_L = 10pF, 10V step applied at t = 0µs

Figure 5-64 Settling Time

V_S = 16V, 650 units

Figure 5-66 Guard Buffer Offset Distribution

V_S = 4.5V, 34 units

Figure 5-68 Guard Buffer Offset Drift Distribution

V_S = 36V, 34 units

Figure 5-70 Guard Buffer Offset Drift Distribution

V_S = 4.5V, 5 typical units

Figure 5-72 Guard Buffer Offset Voltage vs Temperature

V_S = 36V, 5 typical units

Figure 5-74 Guard Buffer Offset Voltage vs Temperature