SBAS883A February 2018 – June 2018 OPT3101
PRODUCTION DATA.
PIN | I/O | TYPE(1) | DESCRIPTION | |
---|---|---|---|---|
NAME | NO. | |||
A0 | 28 | I | AVDD | I2C slave LSB0 address bit |
A1 | 1 | I | AVDD | I2C slave LSB1 address bit |
A2 | 2 | I | AVDD | I2C slave LSB2 address bit |
AVDD | 21 | — | — | 1.8-V analog supply |
AVDD3 | 20 | — | — | 3.3-V analog supply |
AVSS | 23, 26, 27 | — | — | Analog ground |
DVDD | 19 | — | — | 1.8-V digital supply |
GP1 | 11 | O | IOVDD | General-purpose output |
GP2 | 12 | I/O | IOVDD | General-purpose output, CLKREF input |
INM | 24 | I | AVDD | AFE negative input. Connect photodiode equivalent capacitance. Connect the other end of the capacitor to ground AVSS. |
INP | 25 | I | AVDD | AFE positive input. Connect photodiode cathode. Connect the Anode of the photodiode to ground AVSS. |
IOVDD | 9, 10 | — | — | Supply for I/O and illumination driver |
IOVSS | 3, 8 | — | — | Ground for digital and I/O |
NC | 22 | — | — | No internal connection |
REG_MODE | 18 | I | IOVDD | Mode to select internal regulator for 1.8-V supplies (AVDD, DVDD) |
RST_MS | 17 | I | IOVDD | Active-low global reset, monoshot trigger. There is no internal pullup on this pin. Connect this pin to the host controller or add a pullup resistor. |
SCL_M | 15 | O | IOVDD | I2C master clock. Connect with a 10-kΩ resistor to a 3.3-V supply. |
SCL_S | 13 | I | IOVDD | I2C slave clock. Connect with a 10-kΩ resistor to a 3.3-V supply. |
SDA_M | 16 | I/O | IOVDD | I2C master data. Connect with a 10-kΩ resistor to a 3.3-V supply. |
SDA_S | 14 | I/O | IOVDD | I2C slave data. Connect with a 10-kΩ resistor to a 3.3-V supply. |
TX0 | 7 | O | IOVDD | Illumination driver output. Connect to LED cathode. Anode should be connected to a supply. |
TX1 | 5 | O | IOVDD | Illumination driver output. Connect to LED cathode. Anode should be connected to a supply. |
TX2 | 4 | O | IOVDD | Illumination driver output. Connect to LED cathode. Anode should be connected to a supply. |
VSSL | 6 | — | — | Illumination driver ground. |
Thermal pad | — | — | — | Thermal pad of the device. Connect thermal pad to AVSS PCB ground plane using multiple vias for good thermal performance. |