SCPS124H September   2006  – March 2021 PCA9534

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Description (Continued)
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Resistance Characteristics
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Device Functional Modes
      1. 9.2.1 Power-On Reset
      2. 9.2.2 I/O Port
      3. 9.2.3 Interrupt Output ( INT)
        1. 9.2.3.1 Interrupt Errata
          1. 9.2.3.1.1 Description
          2. 9.2.3.1.2 System Impact
          3. 9.2.3.1.3 System Workaround
    3. 9.3 Programming
      1. 9.3.1 I2C Interface
      2. 9.3.2 Register Map
        1. 9.3.2.1 Device Address
        2. 9.3.2.2 Control Register And Command Byte
        3. 9.3.2.3 Register Descriptions
        4. 9.3.2.4 Bus Transactions
          1. 9.3.2.4.1 Writes
          2. 9.3.2.4.2 Reads
  10. 10Application Information Disclaimer
    1. 10.1 Application Information
      1. 10.1.1 Typical Application
        1. 10.1.1.1 Design Requirements
          1. 10.1.1.1.1 Minimizing ICC When The I/O Controls Leds
  11. 11Power Supply Recommendations
    1. 11.1 Power-On Reset Requirements
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-ADC68D59-2AFD-4F46-9F15-52D22C942743-low.gif
Table 6-1 Pin Functions
PIN DESCRIPTION
NAME SOIC (DW),
SSOP (DB),
TSSOP (PW), AND
TVSOP (DGV)		 QFN (RGT
AND RGV)
A0 1 15 Address input. Connect directly to VCC or ground.
A1 2 16 Address input. Connect directly to VCC or ground.
A2 3 1 Address input. Connect directly to VCC or ground.
P0 4 2 P-port input/output. Push-pull design structure.
P1 5 3 P-port input/output. Push-pull design structure.
P2 6 4 P-port input/output. Push-pull design structure.
P3 7 5 P-port input/output. Push-pull design structure.
GND 8 6 Ground
P4 9 7 P-port input/output. Push-pull design structure.
P5 10 8 P-port input/output. Push-pull design structure.
P6 11 9 P-port input/output. Push-pull design structure.
P7 12 10 P-port input/output. Push-pull design structure.
INT 13 11 Interrupt output. Connect to VCC through a pullup resistor.
SCL 14 12 Serial clock bus. Connect to VCC through a pullup resistor.
SDA 15 13 Serial data bus. Connect to VCC through a pullup resistor.
VCC 16 14 Supply voltage