SCPS129K August   2005  – March 2021 PCA9535

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Description Continued
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Resistance Characteristics
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1.     16
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes
      1. 8.2.1 Power-On Reset
      2. 8.2.2 I/O Port
      3. 8.2.3 Interrupt ( INT) Output
        1. 8.2.3.1 Interrupt Errata
          1.        24
          2.        25
          3.        26
    3. 8.3 Programming
      1. 8.3.1 I2C Interface
      2. 8.3.2 Register Map
        1. 8.3.2.1 Device Address
        2. 8.3.2.2 Control Register And Command Byte
        3. 8.3.2.3 Register Descriptions
        4. 8.3.2.4 Bus Transactions
          1. 8.3.2.4.1 Writes
          2. 8.3.2.4.2 Reads
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Minimizing ICC When I/O Is Used To Control Led
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
8.3.2.4.1 Writes

Data is transmitted to the PCA9535 by sending the device address and setting the least-significant bit to a logic 0 (see Figure 8-6 for device address). The command byte is sent after the address and determines which register receives the data that follows the command byte.

The eight registers within the PCA9535 are configured to operate as four register pairs. The four pairs are Input Ports, Output Ports, Polarity Inversions, and Configurations. After sending data to one register, the next data byte is sent to the other register in the pair (see Figure 8-8 and Figure 8-9). For example, if the first byte is sent to Output Port 1 (register 3), the next byte is stored in Output Port 0 (register 2).

There is no limitation on the number of data bytes sent in one write transmission. In this way, each 8-bit register may be updated independently of the other registers.

GUID-F192F80F-F83E-4E20-AA31-03B6CE87A1EE-low.gifFigure 8-8 Write To Output Port Registers

GUID-2B92AED5-0ABC-4E21-A1F8-08086889EE64-low.gifFigure 8-9 Write To Configuration Registers