SCPS069H July   2001  – September 2024 PCF8574A

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 Simplified Block Diagram of Device
      2. 7.2.2 Simplified Schematic Diagram of Each P-Port Input/Output
    3. 7.3 Feature Description
      1. 7.3.1 I2C Interface
      2. 7.3.2 Interface Definition
      3. 7.3.3 Address Reference
    4. 7.4 Device Functional Modes
  9. Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Minimizing ICC When I/Os Control LEDs
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Glossary
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|20
  • DW|16
  • N|16
  • PW|20
  • RGY|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power-On Reset Requirements

In the event of a glitch or data corruption, PCF8574A can be reset to its default conditions by using the power-on reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This reset also happens when the device is powered on for the first time in an application.

The two types of power-on reset are shown in Figure 8-6 and Figure 8-7.

PCF8574A VCC is Lowered Below 0.2 V or 0 V and Then Ramped Up to VCCFigure 8-6 VCC is Lowered Below 0.2 V or 0 V and Then Ramped Up to VCC
PCF8574A VCC is Lowered Below the POR Threshold, Then Ramped Back Up to VCCFigure 8-7 VCC is Lowered Below the POR Threshold, Then Ramped Back Up to VCC

Table 8-1 specifies the performance of the power-on reset feature for PCF8574A for both types of power-on reset.

Table 8-1 Recommended Supply Sequencing and Ramp Rates(1)
PARAMETERMINTYPMAXUNIT
VCC_FTFall rateSee Figure 8-61100ms
VCC_RTRise rateSee Figure 8-60.01100ms
VCC_TRR_GNDTime to re-ramp (when VCC drops to GND)See Figure 8-60.001ms
VCC_TRR_POR50Time to re-ramp (when VCC drops to VPOR_MIN – 50 mV)See Figure 8-70.001ms
VCC_GHLevel that VCCP can glitch down to, but not cause a functional disruption when VCCX_GW = 1 μsSee Figure 8-81.2V
VCC_GWGlitch width that will not cause a functional disruption when VCCX_GH = 0.5 × VCCxSee Figure 8-8μs
VPORFVoltage trip point of POR on falling VCC0.991.28V
VPORRVoltage trip point of POR on fising VCC1.1901.410V
TA = –40°C to 85°C (unless otherwise noted)

Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width (VCC_GW) and height (VCC_GH) are dependent on each other. The bypass capacitance, source impedance, and device impedance are factors that affect power-on reset performance. Figure 8-8 and Table 8-1 provide more information on how to measure these specifications.

PCF8574A Glitch Width and Glitch HeightFigure 8-8 Glitch Width and Glitch Height

VPOR is critical to the power-on reset. VPOR is the voltage level at which the reset condition is released and all the registers and the I2C/SMBus state machine are initialized to their default states. The value of VPOR differs based on the VCC being lowered to or from 0. Figure 8-9 and Table 8-1 provide more details on this specification.

PCF8574A VPORFigure 8-9 VPOR