PCF8575C Remote 16-Bit I2C AND SMBus Low-Power I/O Expander with Interrupt Output
- SCPS123F March 2005 – January 2015 PCF8575C
  
  PRODUCTION DATA.

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DATA SHEET

PCF8575C Remote 16-Bit I2C AND SMBus Low-Power I/O Expander with Interrupt Output

1 Features

I²C to Parallel-Port Expander
Open-Drain Interrupt Output
Low Standby-Current Consumption of 10 μA Maximum
Compatible With Most Microcontrollers
400-kHz Fast I²C Bus
Address by Three Hardware Address Pins for Use of up to Eight Devices
Latched Outputs With High-Current Drive Capability for Directly Driving LEDs
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model
- 200-V Machine Model
- 1000-V Charged-Device Model

2 Applications

Telecom Shelters: Filter Units
Servers
Routers (Telecom Switching Equipment)
Personal Computers
Personal Electronics
Industrial Automation
Products with GPIO-Limited Processors

3 Description

This 16-bit I/O expander for the two-line bidirectional bus (I²C) is designed for 4.5-V to 5.5-V V_CC operation.

The PCF8575C provides general-purpose remote I/O expansion for most microcontroller families via the I²C interface serial clock (SCL) and serial data (SDA).

The device features a 16-bit quasi-bidirectional input/output (I/O) port (P07–P00, P17–P10), including latched outputs with high-current drive capability for directly driving LEDs. Each quasi-bidirectional I/O can be used as an input or output without the use of a data-direction control signal. At power on, the I/Os are in 3-state mode. The strong pullup to V_CC allows fast-rising edges into heavily loaded outputs. This device turns on when an output is written high and is switched off by the negative edge of SCL. The I/Os should be high before being used as inputs. After power on, as all the I/Os are set to 3-state, all of them can be used as inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the write mode. If a high is applied externally to an I/O that has been written earlier to low, a large current (I_OL) flows to GND.

Device Information⁽¹⁾

PART NUMBER	PACKAGE (PIN)	BODY SIZE
PCF8575C	SSOP (24)	8.20 mm × 5.30 mm
	QSOP (24)	8.65 mm × 3.90
	TVSOP (24)	5.00 mm × 4.50 mm
	SOIC (24)	15.40 mm × 7.50 mm
	TSSOP (24)	7.80 mm × 4.40 mm
	QFN (24)	4.0 mm × 4.0 mm

For all available packages, see the orderable addendum at the end of the data sheet.

4 Revision History

Changes from E Revision (October 2007) to F Revision

Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table, Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.Go
Deleted Ordering Information table.Go

5 Pin Configuration

Pin Functions

PIN			TYPE	DESCRIPTION
NAME	NO.
NAME	DB, DBQ, DGV, DW, AND PW	RGE
INT	1	22	I	Interrupt output. Connect to V_CC through a pullup resistor.
A1	2	23	I	Address input 1. Connect directly to V_CC or ground. Pullup resistors are not needed.
A2	3	24	I	Address input 2. Connect directly to V_CC or ground. Pullup resistors are not needed.
P00	4	1	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P01	5	2	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P02	6	3	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P03	7	4	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P04	8	5	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P05	9	6	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P06	10	7	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P07	11	8	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
GND	12	9	—	Ground
P10	13	10	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P11	14	11	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P12	15	12	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P13	16	13	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P14	17	14	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P15	18	15	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P16	19	16	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
P17	20	17	I/O	P-port input/output. Open-drain design structure. Connect to V_CC through a pullup resistor.
A0	21	18	I	Address input 0. Connect directly to V_CC or ground. Pullup resistors are not needed.
SCL	22	19	I	Serial clock line. Connect to V_CC through a pullup resistor
SDA	23	20	I/O	Serial data line. Connect to V_CC through a pullup resistor.
V_CC	24	21	—	Supply voltage

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

			MIN	MAX	UNIT
V_CC	Supply voltage range		–0.5	6.5	V
V_I	Input voltage range⁽²⁾		–0.5	V_CC + 0.5	V
V_O	Output voltage range⁽²⁾		–0.5	V_CC + 0.5	V
I_IK	Input clamp current	V_I < 0		–20	mA
I_OK	Output clamp current	V_O < 0		–20	mA
I_OK	Input/output clamp current	V_O < 0 or V_O > V_CC		±400	μA
I_OL	Continuous output low current	V_O = 0 to V_CC		50	mA
I_OH	Continuous output high current	V_O = 0 to V_CC		–4	mA
	Continuous current through V_CC or GND			±100	mA
T_stg	Storage temperature range		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

6.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins		2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins		1000	V

6.3 Recommended Operating Conditions

			MIN	MAX	UNIT
V_CC	Supply voltage		4.5	5.5	V
V_IH	High-level input voltage	A0, A1, A2, SDA, and SCL	0.7 × V_CC	V_CC + 0.5	V
V_IH	High-level input voltage	P07–P00 and P17–P10	0.8 × V_CC	V_CC + 0.5	V
V_IL	Low-level input voltage	A0, A1, A2, SDA, and SCL	–0.5	0.3 × V_CC	V
V_IL	Low-level input voltage	P07–P00 and P17–P10	–0.5	0.6 × V_CC	V
I_OHT	P-port transient pullup current			–10	mA
I_OL	P-port low-level output current			25	mA
T_A	Operating free-air temperature		–40	85	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		PCF8575						UNIT
		DB	DBQ	DGV	DW	PW	RGE
		24 PINS
R_θ_JA	Junction-to-ambient thermal resistance	63	61	86	46	88	53	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS		V_CC	MIN	TYP⁽¹⁾	MAX	UNIT
V_IK	Input diode clamp voltage	I_I = –18 mA		4.5 V to 5.5 V	–1.2			V
V_POR	Power-on reset voltage⁽²⁾	V_I = V_CC or GND,	I_O = 0	V_POR		1.2	1.8	V
I_OHT	P-port transient pullup current	High during ACK V_OH = GND		4.5 V	–0.5	–1		mA
I_OL	SDA	V_OL = 0.4 V		4.5 V to 5.5 V	3			mA
	P port	V_OL = 0.4 V		4.5 V to 5.5 V	5	15
	P port	V_OL = 1 V		4.5 V to 5.5 V	10	25
	INT	V_OL = 0.4 V		4.5 V to 5.5 V	1.6
I_I	SCL, SDA	V_I = V_CC or GND		4.5 V to 5.5 V			±2	μA
I_I	A0, A1, A2	V_I = V_CC or GND		4.5 V to 5.5 V			±1	μA
I_IHL	P port	V_I ≥ V_CC or V_I ≤ GND		4.5 V to 5.5 V			±400	μA
I_CC	Operating mode	V_I = V_CC or GND,	I_O = 0, f_SCL = 400 kHz	5.5 V		100	200	μA
I_CC	Standby mode	V_I = V_CC or GND,	I_O = 0, f_SCL = 0 kHz	5.5 V		2.5	10	μA
ΔI_CC	Supply current increase	One input at V_CC – 0.6 V, Other inputs at V_CC or GND		4.5 V to 5.5 V			200	μA
C_i	SCL	V_I = V_CC or GND		4.5 V to 5.5 V		3	7	pF
C_io	SDA	V_IO = V_CC or GND		4.5 V to 5.5 V		3	7	pF
C_io	P port	V_IO = V_CC or GND		4.5 V to 5.5 V		4	10	pF

(1) All typical values are at V_CC = 5 V, T_A = 25°C.

(2) The power-on reset circuit resets the I²C bus logic with V_CC < V_POR and sets all I/Os to logic high (with current source to V_CC).

6.6 I²C Interface Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7)

			MIN	MAX	UNIT
f_scl	I²C clock frequency			400	kHz
t_sch	I²C clock high time		0.6		μs
t_scl	I²C clock low time		1.3		μs
t_sp	I²C spike time			50	ns
t_sds	I²C serial-data setup time		100		ns
t_sdh	I²C serial-data hold time		0		ns
t_icr	I²C input rise time		20 + 0.1C_b⁽¹⁾	300	ns
t_icf	I²C input fall time		20 + 0.1C_b⁽¹⁾	300	ns
t_ocf	I²C output fall time (10-pF to 400-pF bus)			300	ns
t_buf	I²C bus free time between stop and start		1.3		μs
t_sts	I²C start or repeated start condition setup		0.6		μs
t_sth	I²C start or repeated start condition hold		0.6		μs
t_sps	I²C stop condition setup		0.6		μs
t_vd	Valid-data time	SCL low to SDA output valid		1.2	μs
C_b	I²C bus capacitive load			400	pF

(1) C_b = total bus capacitance of one bus line in pF

6.7 Switching Characteristics

over recommended operating free-air temperature range, C_L ≤ 100 pF (unless otherwise noted) (see Figure 8 and Figure 9)

PARAMETER		FROM (INPUT)	TO (OUTPUT)	MIN	MAX	UNIT
t_iv	Interrupt valid time	P port	INT		4	μs
t_ir	Interrupt reset delay time	SCL	INT		4	μs
t_pv	Output data valid	SCL	P port		4	μs
t_su	Input data setup time	P port	SCL	0		μs
t_h	Input data hold time	P port	SCL	4		μs

6.8 Typical Characteristics

T_A = 25°C (unless otherwise noted)

Figure 1. Supply Current vs Temperature

Figure 3. Supply Current vs Supply Voltage

Figure 5. I/O Output Low Voltage vs Temperature

Figure 2. Standby Supply Current vs Temperature

Figure 4. I/O Sink Current vs Output Low Voltage

Figure 6. I/O High Voltage vs Temperature