SLES142B JUNE   2005  – July 2016 PCM1803A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
      1. 6.6.1 Typical Curves of Internal Filter
        1. 6.6.1.1 Decimation Filter Frequency Response
        2. 6.6.1.2 Low-Cut Filter Frequency Response
      2. 6.6.2 Typical Performance Curves
      3. 6.6.3 Output Spectrum
      4. 6.6.4 Supply Current
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hardware Control
      2. 7.3.2 Power-On-Reset Sequence
      3. 7.3.3 System Clock
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Audio Data Interface
        1. 7.4.1.1 Interface Mode
          1. 7.4.1.1.1 Master Mode
          2. 7.4.1.1.2 Slave Mode
        2. 7.4.1.2 Data Format
        3. 7.4.1.3 Interface Timing
      2. 7.4.2 Synchronization With Digital Audio System
      3. 7.4.3 Power Down
      4. 7.4.4 HPF Bypass
      5. 7.4.5 Oversampling Ratio Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Control Pins
        2. 8.2.2.2 DSP or Audio Processor
        3. 8.2.2.3 Input Filters
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 VCC, VDD Pins
      2. 10.1.2 AGND, DGND Pins
      3. 10.1.3 VINL, VINR Pins
      4. 10.1.4 VREF1 Pin
      5. 10.1.5 VREF2 Pin
      6. 10.1.6 DOUT Pin
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The PCM1803A device is suitable for wide variety of cost-sensitive consumer applications requiring good performance and operation with a 5-V analog supply and 3.3-V digital supply.

8.2 Typical Application

Figure 24 illustrates a typical circuit connection diagram where the cutoff frequency of the input HPF is about 160 kHz.

PCM1803A s0026-03.gif
A. C1, C2: A 1-μF electrolytic capacitor gives a 4-Hz (τ = 1 μF × 40 kΩ) cutoff frequency for the input HPF in normal operation and requires a power-on settling time with a 40-ms time constant during the power-on initialization period.
B. C3, C4: Bypass capacitors are 0.1-μF ceramic and 10-μF electrolytic, depending on layout and power supply.
C. C5, C6: Recommended capacitors are 0.1-μF ceramic and 10-μF electrolytic.
D. C7, C8, R1, R2: A 0.01-μF film-type capacitor and 100-Ω resistor give a 160-kHz (τ = 0.01 μF × 100 Ω) cutoff frequency for the anti-aliasing filter in normal operation.
Figure 24. Typical Application Diagram

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 11 as the input parameters.

Table 11. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Analog Input Voltage Range 0 Vp-p to 3 Vp-p
Output PCM audio data
System Clock Input Frequency 2.048 MHz to 49.152 MHz
Output Sampling Frequency 8 kHz to 96 kHz
Power Supply 3.3 V and 5 V

8.2.2 Detailed Design Procedure

8.2.2.1 Control Pins

The control pins such as the FMT, MODE, OSR, and BYPASS can be controlled by tying up to VDD, down to GND, or driven with GPIO from the DSP or audio processor.

8.2.2.2 DSP or Audio Processor

In this application a DSP or audio processor is acting as the audio master, and the PCM1803A is acting as the audio slave. This means the DSP or audio processor must be able to output audio clocks that the PCM1803A can use to process audio signals.

8.2.2.3 Input Filters

For the analog input circuit an AC coupling capacitor must be placed in series with the input. This removes the DC component of the input signal. An RC filter can also be implemented to filter out of band noise to reduce aliasing. Equation 1 can be used to calculate the cutoff frequency of the optional RC filter for the input.

Equation 1. PCM1803A eq_1_SLES142.gif

8.2.3 Application Curve

PCM1803A sles142_g011.gif Figure 25. Total Harmonic Distortion + Noise vs fSAMPLE Condition