SBAS989
April 2019
PCM1840
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Simplified Block Diagram
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements: TDM, I2S or LJ Interface
6.7
Switching Characteristics: TDM, I2S or LJ Interface
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Hardware Control
7.3.2
Audio Serial Interfaces
7.3.2.1
Time Division Multiplexed Audio (TDM) Interface
7.3.2.2
Inter IC Sound (I2S) Interface
7.3.2.3
Left-Justified (LJ) Interface
7.3.3
Phase-Locked Loop (PLL) and Clock Generation
7.3.4
Input Channel Configurations
7.3.5
Reference Voltage
7.3.6
Microphone Bias
7.3.7
Signal-Chain Processing
7.3.7.1
Digital High-Pass Filter
7.3.7.2
Configurable Digital Decimation Filters
7.3.7.2.1
Linear Phase Filters
7.3.7.2.1.1
Sampling Rate: 8 kHz or 7.35 kHz
7.3.7.2.1.2
Sampling Rate: 16 kHz or 14.7 kHz
7.3.7.2.1.3
Sampling Rate: 24 kHz or 22.05 kHz
7.3.7.2.1.4
Sampling Rate: 32 kHz or 29.4 kHz
7.3.7.2.1.5
Sampling Rate: 48 kHz or 44.1 kHz
7.3.7.2.1.6
Sampling Rate: 96 kHz or 88.2 kHz
7.3.7.2.1.7
Sampling Rate: 192 kHz or 176.4 kHz
7.3.7.2.2
Low-Latency Filters
7.3.7.2.2.1
Sampling Rate: 16 kHz or 14.7 kHz
7.3.7.2.2.2
Sampling Rate: 24 kHz or 22.05 kHz
7.3.7.2.2.3
Sampling Rate: 32 kHz or 29.4 kHz
7.3.7.2.2.4
Sampling Rate: 48 kHz or 44.1 kHz
7.3.7.2.2.5
Sampling Rate: 96 kHz or 88.2 kHz
7.3.8
Dynamic Range Enhancer (DRE)
7.4
Device Functional Modes
7.4.1
Hardware Shutdown
7.4.2
Active Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Community Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTW|24
MPQF167C
Thermal pad, mechanical data (Package|Pins)
RTW|24
QFND125K
Orderable Information
sbas989_oa
sbas989_pm
6.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
±500
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.