SBASAU2 May   2024 PCM1841-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements: TDM, I2S or LJ Interface
    7. 5.7 Switching Characteristics: TDM, I2S or LJ Interface
    8. 5.8 Timing Diagram
    9. 5.9 Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Hardware Control
      2. 6.3.2 Audio Serial Interfaces
        1. 6.3.2.1 Time Division Multiplexed Audio (TDM) Interface
        2. 6.3.2.2 Inter IC Sound (I2S) Interface
        3. 6.3.2.3 Left-Justified (LJ) Interface
      3. 6.3.3 Phase-Locked Loop (PLL) and Clock Generation
      4. 6.3.4 Input Channel Configurations
      5. 6.3.5 Reference Voltage
      6. 6.3.6 Microphone Bias
      7. 6.3.7 Signal-Chain Processing
        1. 6.3.7.1 Digital High-Pass Filter
        2. 6.3.7.2 Configurable Digital Decimation Filters
          1. 6.3.7.2.1 Linear Phase Filters
            1. 6.3.7.2.1.1 Sampling Rate: 8kHz or 7.35kHz
            2. 6.3.7.2.1.2 Sampling Rate: 16kHz or 14.7kHz
            3. 6.3.7.2.1.3 Sampling Rate: 24kHz or 22.05kHz
            4. 6.3.7.2.1.4 Sampling Rate: 32kHz or 29.4kHz
            5. 6.3.7.2.1.5 Sampling Rate: 48kHz or 44.1kHz
            6. 6.3.7.2.1.6 Sampling Rate: 96kHz or 88.2kHz
            7. 6.3.7.2.1.7 Sampling Rate: 192kHz or 176.4kHz
          2. 6.3.7.2.2 Low-Latency Filters
            1. 6.3.7.2.2.1 Sampling Rate: 16kHz or 14.7kHz
            2. 6.3.7.2.2.2 Sampling Rate: 24kHz or 22.05kHz
            3. 6.3.7.2.2.3 Sampling Rate: 32kHz or 29.4kHz
            4. 6.3.7.2.2.4 Sampling Rate: 48kHz or 44.1kHz
            5. 6.3.7.2.2.5 Sampling Rate: 96kHz or 88.2kHz
      8. 6.3.8 Dynamic Range Enhancer (DRE)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Hardware Shutdown
      2. 6.4.2 Active Mode
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9Revision History
  11.   Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.9 Typical Characteristics

at TA = 25°C, AVDD = 3.3V, IOVDD = 3.3V, fIN = 1kHz sinusoidal signal, fS = 48kHz, 32-bit audio data, BCLK = 256 × fS, TDM target mode, PLL on, DRE_LVL = –36dB, channel gain = 0dB, and linear phase decimation filter (unless otherwise noted); all performance measurements are done with a 20kHz, low-pass filter, and an A-weighted filter

PCM1841-Q1 THD+N vs Input Amplitude With DRE Enabled
Differential input
Figure 5-2 THD+N vs Input Amplitude
With DRE Enabled
PCM1841-Q1 THD+N vs Input Frequency With a –60dBr Input
Figure 5-4 THD+N vs Input Frequency
With a –60dBr Input
PCM1841-Q1 Frequency Response With a –12dBr Input
Figure 5-6 Frequency Response
With a –12dBr Input
PCM1841-Q1 FFT With Idle Input With DRE Enabled
 
Figure 5-8 FFT With Idle Input With DRE Enabled
PCM1841-Q1 FFT With a –60dBr Input With DRE Enabled
 
Figure 5-10 FFT With a –60dBr Input With DRE Enabled
PCM1841-Q1 FFT With a –1dBr Input With DRE Enabled
 
Figure 5-12 FFT With a –1dBr Input With DRE Enabled
PCM1841-Q1 THD+N vs Input Amplitude With DRE Disabled
Differential input
Figure 5-3 THD+N vs Input Amplitude
With DRE Disabled
PCM1841-Q1 THD+N vs Input Frequency With a –1dBr Input
Figure 5-5 THD+N vs Input Frequency
With a –1dBr Input
PCM1841-Q1 Power-Supply Rejection Ratio vs Ripple Frequency With 100mVPP Amplitude
Figure 5-7 Power-Supply Rejection Ratio vs
Ripple Frequency With 100mVPP Amplitude
PCM1841-Q1 FFT With Idle Input With DRE Disabled
 
Figure 5-9 FFT With Idle Input With DRE Disabled
PCM1841-Q1 FFT With a –60dBr Input With DRE Disabled
 
Figure 5-11 FFT With a –60dBr Input With DRE Disabled
PCM1841-Q1 FFT With a –1dBr Input With DRE Disabled
 
Figure 5-13 FFT With a –1dBr Input With DRE Disabled