SBFS036B May   2015  – August 2015 PCM2704C , PCM2705C , PCM2706C

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information: PCM2704C, PCM2705C
    5. 7.5  Thermal Information: PCM2706C, PCM2707C
    6. 7.6  Electrical Characteristics: PCM2704CDB, PCM2705CDB, PCM2706CPJT, PCM2707CPJT
    7. 7.7  Audio Interface Timing Characteristics
    8. 7.8  Audio Clock Timing Characteristics
    9. 7.9  External ROM Read Interface Timing Characteristics
    10. 7.10 SPI Timing Characteristics
    11. 7.11 Typical Characteristics
      1. 7.11.1 Internal Filter: DAC Digital Interpolation Filter Frequency Response
      2. 7.11.2 Internal Filter: DAC Analog Low-Pass Filter Frequency Response
      3. 7.11.3 General Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1  Clock and Reset
      2. 9.3.2  Operation Mode Selection
        1. 9.3.2.1 Power Configuration Select/Host Detection
        2. 9.3.2.2 Function Select (PCM2706C/7C Only)
      3. 9.3.3  DAC
      4. 9.3.4  Digital Audio Interface: S/PDIF Output
        1. 9.3.4.1 Channel Status Information
        2. 9.3.4.2 Copyright Management
      5. 9.3.5  Digital Audio Interface: I2S Interface Output (PCM2706C/7C)
      6. 9.3.6  Descriptor Data Modification
      7. 9.3.7  External ROM Descriptor (PCM2704C/6C)
      8. 9.3.8  External ROM Example
      9. 9.3.9  Serial Programming Interface (PCM2705C/7C)
      10. 9.3.10 USB Host Interface Sequence
        1. 9.3.10.1 Power-On, Attach, and Playback Sequence
        2. 9.3.10.2 Play, Stop, and Detach Sequence
        3. 9.3.10.3 Suspend and Resume Sequence
      11. 9.3.11 Operating Environment
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
      1. 9.5.1 USB Interface
        1. 9.5.1.1 Device Configuration
        2. 9.5.1.2 Interface Number 0 (Default/Control Interface)
        3. 9.5.1.3 Interface Number 1 (Isochronous-Out Interface)
        4. 9.5.1.4 Interface Number 2 (HID Interface)
          1. 9.5.1.4.1 HID Items Reported
            1. 9.5.1.4.1.1 Basic HID Operation
            2. 9.5.1.4.1.2 Extended HID Operation (PCM2705/6/7)
            3. 9.5.1.4.1.3 Auxiliary HID Status Report (PCM2705C/7C)
        5. 9.5.1.5 Endpoints
    6. 9.6 Register Maps
      1. 9.6.1 SPI Register (PCM2705C/7C)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Typical Circuit Connection 1: USB Speaker
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Typical Circuit Connection 2: Remote Headphone
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves
      3. 10.2.3 Typical Circuit Connection 3: DSP Surround Processing Amplifier
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

PCM2704C, PCM2705C DB Package
28-Pin SSOP
Top View
PCM2704C PCM2705C PCM2706C PCM2707C po_28_db_bfs036.gif

Pin Functions: DB Package (PCM2704C/PCM2705C)

PIN I/O DESCRIPTION
NAME NO.
AGNDL 12 — Analog ground for headphone amplifier of L-channel
AGNDR 17 — Analog ground for headphone amplifier of R-channel
CK 2 O Clock output for external ROM (PCM2704C). Must be left open (PCM2705C).
D+ 9 I/O USB differential input/output plus(1)
D– 8 I/O USB differential input/output minus(1)
DGND 6 — Digital ground
DOUT 5 O S/PDIF output
DT 3 I/O Data input/output for external ROM (PCM2704C). Must be left open with pullup resistor (PCM2705C).(1)
HID0/MS 22 I HID key state input (mute), active high (PCM2704C). MS input (PCM2705C)(3)
HID1/MC 23 I HID key state input (volume up), active high (PCM2704C). MC input (PCM2705C)(3)
HID2/MD 24 I HID key state input (volume down), active high (PCM2704C). MD input (PCM2705C)(3)
HOST 21 I Host detection during self-powered operation (connect to VBUS). Max power select during bus-powered operation (low: 100 mA, high: 500 mA).(2)
PGND 19 — Analog ground for DAC, OSC, and PLL
PSEL 4 I Power source select (low: self-power, high: bus-power)(1)
SSPND 27 O Suspend flag, active low (low: suspend, high: operational)
TEST0 26 I Test pin. Must be set high(1)
TEST1 25 I Test pin. Must be set high(1)
VBUS 10 — Connect to USB power (VBUS) for bus-powered operation. Connect to VDD for self-powered operation.
VCCL 13 — Analog power supply for headphone amplifier of L-channel(4)
VCCP 20 — Analog power supply for DAC, OSC, and PLL(4)
VCCR 16 — Analog power supply for headphone amplifier of R-channel(4)
VCOM 18 — Common voltage for DAC (VCCP/2). Connect decoupling capacitor to PGND.
VDD 7 — Digital power supply(4)
VOUTL 14 O DAC analog output for L-channel
VOUTR 15 O DAC analog output for R-channel
XTI 28 I Crystal oscillator input(1)
XTO 1 O Crystal oscillator output
ZGND 11 — Ground for internal regulator
(1) LV-TTL level.
(2) LV-TTL level, 5-V tolerant
(3) LV-TTL level with internal pulldown
(4) Connect decoupling capacitor to GND. Supply 3.3 V for self-powered applications.
PCM2706C, PCM2707C PJT Package
32-Pin TQFP
Top View
PCM2704C PCM2705C PCM2706C PCM2707C po_32_pjt_bfs036.gif

Pin Functions: PJT Package (PCM2706C/PCM2707C)

PIN I/O DESCRIPTION
NAME NO.
AGNDL 26 — Analog ground for headphone amplifier of L-channel
AGNDR 31 — Analog ground for headphone amplifier of R-channel
CK 14 O Clock output for external ROM (PCM2706C). Must be left open (PCM2707C).
D+ 23 I/O USB differential input/output plus(1)
D– 22 I/O USB differential input/output minus(1)
DGND 20 — Digital ground
DOUT 17 O S/PDIF output/I2S data output
DT 15 I/O Data input/output for external ROM (PCM2706C). Must be left open with pullup resistor (PCM2707C).(1)
FSEL 9 I Function select (low: I2S data output, high: S/PDIF output)(1)
FUNC0 5 I/O HID key state input (next track), active high (FSEL = 1). I2S LR clock output (FSEL = 0).(3)
FUNC1 19 I/O HID key state input (previous track), active high (FSEL = 1). I2S bit clock output (FSEL = 0).(3)
FUNC2 18 I/O HID key state input (stop), active high (FSEL = 1). I2S system clock output (FSEL = 0).(3)
FUNC3 4 I HID key state input (play/pause), active high (FSEL = 1). I2S data input (FSEL = 0).(3)
HID0/MS 6 I HID key state input (mute), active high (PCM2706C). MS input (PCM2707C).(3)
HID1/MC 7 I HID key state input (volume up), active high (PCM2706C). MC input (PCM2707C).(3)
HID2/MD 8 I HID key state input (volume down), active high (PCM2706C). MD input (PCM2707C).(3)
HOST 3 I Host detection during self-powered operation (connect to VBUS). Max power select during bus-powered operation. (low: 100 mA, high: 500 mA).(2)
PGND 1 — Analog ground for DAC, OSC, and PLL
PSEL 16 I Power source select (low: self-power, high: bus-power)(1)
SSPND 11 O Suspend flag, active low (low: suspend, high: operational)
TEST 10 I Test pin. Must be set high(1)
VBUS 24 — Connect to USB power (VBUS) for bus-powered operation. Connect to VDD for self-powered operation.
VCCL 27 — Analog power supply for headphone amplifier of L-channel(4)
VCCP 2 — Analog power supply for DAC, OSC, and PLL(4)
VCCR 30 — Analog power supply for headphone amplifier of R-channel(4)
VCOM 32 — Common voltage for DAC (VCCP/2). Connect decoupling capacitor to PGND.
VDD 21 — Digital power supply(4)
VOUTL 28 O DAC analog output for L-channel
VOUTR 29 O DAC analog output for R-channel
XTI 12 I Crystal oscillator input(1)
XTO 13 O Crystal oscillator output
ZGND 25 — Ground for internal regulator
(1) LV-TTL level
(2) LV-TTL level, 5-V tolerant
(3) LV-TTL level with internal pulldown
(4) Connect decoupling capacitor to GND. Supply 3.3 V for self-powered applications.