SBASAH2A April 2022 – August 2022 PCM6120-Q1
PRODUCTION DATA
The device supports the I2C control protocol as a target device, and is capable of operating in standard mode, fast mode, and fast mode plus. The I2C control protocol requires a 7-bit target address. The 7-bit target address is fixed at 1001110 and cannot be changed. If the I2C_BRDCAST_EN (P0_R2_D2) bit is set to 1'b1, then the I2C target address is fixed to 1001100 in order to allow simultaneous I2C broadcast communication to multiple devices in the system, including the PCMx140-Q1, PCMD3140-Q1, and PCMD3180-Q1 devices. Table 8-53 lists the possible device addresses resulting from this configuration.
I2C_BRDCAST_EN (P0_R2_D2) | I2C TARGET ADDRESS |
---|---|
0 (default) | 1001 110 |
1 | 1001 100 |