The PGA460-Q1 device is a highly-integrated system on-chip ultrasonic transducer driver and signal conditioner with an advanced DSP core. The device has a complimentary low-side driver pair that can drive a transducer either in a transformer based topology using a step-up transformer or in a direct-drive topology using external high-side FETs. The device can receive and condition the reflected echo signal for reliable object detection. This feature is accomplished using an analog front-end (AFE) consisting of a low-noise amplifier followed by a programmable time-varying gain stage feeding into an ADC. The digitized signal is processed in the DSP core for both near-field and far-field object detection using time-varying thresholds.
The main communication with an external controller is achieved by either a time-command interface (TCI) or a one-wire USART asynchronous interface on the IO pin, or a CMOS-level USART interface on the RXD and TXD pins. The PGA460-Q1 can be put in ultra-low quiescent current low-power mode to reduce power consumption when not in use and can be woken up by commands on the communication interfaces.
The PGA460-Q1 also includes on-chip system diagnostics which monitor transducer voltage during burst, frequency and decay time of transducer to provide information about the integrity of the excitation as well as supply-side and transceiver-side diagnostics for overvoltage, undervoltage, overcurrent and short-circuit scenarios.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
PGA460-Q1 | TSSOP (16) | 5.00 mm × 4.40 mm |
Changes from Revision B (January 2019) to Revision C (February 2023)
Changes from Revision A (August 2017) to Revision B (January 2019)
Changes from Revision * (February 2017) to Revision A (August 2017)
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | GND | P | Ground |
2 | INP | I | Positive transducer receive |
3 | INN | I | Negative transducer receive |
4 | GND | P | Ground |
5 | OUTA | O | Transducer driver output A |
6 | GNDP | P | Power ground |
7 | OUTB | O | Transducer driver output B |
8 | IO | I/O | Time-command interface data input and output |
9 | TEST | I/O | Test output pin |
10 | TXD | O | USART interface transmit |
11 | RXD | I | USART interface receive |
12 | SCLK | I | USART synchronous-mode clock input |
13 | DECPL | O | Decoupling transistor gate drive |
14 | IOREG | P | I/O buffer voltage regulator capacitor |
15 | VPWR | P | Power-supply voltage |
16 | AVDD | P | Analog voltage-regulator capacitor |