SBOSAE0B April   2023  – September 2023 PGA855

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Gain Control
      2. 8.3.2 Input Protection
      3. 8.3.3 Output Common-Mode Pin
      4. 8.3.4 Using the Fully Differential Output Amplifier to Shape Noise
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Linear Operating Input Range
    2. 9.2 Typical Applications
      1. 9.2.1 ADS127L11 and ADS127L21, 24-Bit, Delta-Sigma ADC Driver Circuit
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 ADS8900B 20-Bit SAR ADC Driver Circuit
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.4 Using the Fully Differential Output Amplifier to Shape Noise

Section 8.2 shows that the PGA855 output-stage fully-differential amplifier uses 5-kΩ feedback resistors between the OUT+ and OUT– outputs and the inverting and noninverting inputs, respectively. External direct access to the inverting and noninverting inputs of the fully differential amplifier is provided through the FDA_IN– and FDA_IN+ pins, respectively. This option allows circuit designers to add external feedback capacitors in parallel with the internal feedback resistors to implement noise-filtering or noise-shaping techniques. These pins can also be used to implement customized attenuating gains for the output stage. Consider the following important factors when designing parallel circuits with the internal feedback resistors:

  • The accuracy of the internal resistor network is 0.01 % or better. This accuracy results in a common-mode rejection (CMRR) of 80 dB or better. Mismatched leakage currents on these pins can cause CMRR degradation.
  • The internal resistors have ±15% absolute resistance variation and must be considered when implementing custom attenuating gains or noise filters.
CAUTION: Do not treat these pins as outputs, nor use the pins to source or sink current. Excessive currents through the feedback resistors can cause permanent damage to internal circuitry.