SBOSAE0B April   2023  – September 2023 PGA855

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Gain Control
      2. 8.3.2 Input Protection
      3. 8.3.3 Output Common-Mode Pin
      4. 8.3.4 Using the Fully Differential Output Amplifier to Shape Noise
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Linear Operating Input Range
    2. 9.2 Typical Applications
      1. 9.2.1 ADS127L11 and ADS127L21, 24-Bit, Delta-Sigma ADC Driver Circuit
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 ADS8900B 20-Bit SAR ADC Driver Circuit
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The PGA855 is a high-bandwidth programmable gain instrumentation amplifier with fully differential outputs. The PGA855 is equipped with eight binary gain settings, from an attenuating gain of 0.125 V/V to a maximum of 16 V/V, using three digital gain selection pins. The output common-mode voltage can be independently set using the VOCM pin.

The PGA855 architecture is optimized to drive inputs of high-resolution, precision analog-to-digital converters (ADCs) with sampling rates up to 1 MSPS without the need for an additional ADC driver. The output-stage power supplies (LVSS/LVDD) are decoupled from the input stage and can be connected to power supplies of the ADC to protect the ADC or downstream device against overdrive damage.

The super-beta input transistors offer an impressively low input bias current, which in turn provides a very low input current noise density of 0.3 pA/√Hz, making the PGA855 a versatile choice for virtually any sensor type. The low-noise current-feedback front-end architecture offers excellent gain flatness, even at high frequencies, making the PGA855 an excellent high-impedance sensor readout device. Integrated protection circuitry on the input pins handles overvoltages up to ±40 V beyond the power-supply voltages.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
PGA855 RGT (VQFN, 16) 3 mm × 3 mm
(1) For available packages, see the package option addendum.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20230328-SS0I-RXLZ-3HNN-ZGPXTCXGFXKZ-low.svgPGA855 Simplified Application
GUID-20230320-SS0I-2NDC-LBRW-39CDKWTFN4RG-low.svgGain vs Frequency