SBVS032I March   2002  – July 2022 REF3012 , REF3020 , REF3025 , REF3030 , REF3033 , REF3040

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Supply Voltage
      2. 8.3.2 Thermal Hysteresis
      3. 8.3.3 Temperature Drift
      4. 8.3.4 Noise Performance
      5. 8.3.5 Long-Term Stability
      6. 8.3.6 Load Regulation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Negative Reference Voltage
      2. 8.4.2 Data Acquisition
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1 Design Requirements

  • Supply Voltage: 3.3 V
  • Maximum Input Voltage: ±6 V
  • Specified Input Voltage: ±5 V
  • ADC Reference Voltage: 1.25 V

The goal for this design is to accurately condition a ±5-V bipolar input voltage into a voltage suitable for conversion by a low-voltage ADC with a 1.25-V reference voltage, VREF, and an input voltage range of VREF / 2. The circuit should function with reduced performance over a wider input range of at least ±6 V to allow for easier protection of overvoltage conditions.