SBOS502F September   2009  – December 2016 REF5025-HT

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Adjustment Using the TRIM/NR Pin
      2. 7.3.2 Low Temperature Drift
      3. 7.3.3 Temperature Monitoring
      4. 7.3.4 Noise Performance
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Negative Reference Voltage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Positive Reference Voltage
        1. 8.2.2.1 Detailed Design Procedure
          1. 8.2.2.1.1 Load Capacitance
          2. 8.2.2.1.2 Bandgap Noise Reduction
    3. 8.3 System Example
      1. 8.3.1 Data Acquisition
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

  • Place the power-supply bypass capacitor as closely as possible to the VIN pin and ground pins. TI recommends a bypass capacitor value of 1 μF to 10 μF. If necessary, additional decoupling capacitance can be added to compensate for noisy or high-impedance power supplies.
  • Place a 1-µF noise filtering capacitor between the NR pin and ground.
  • The output must be decoupled with a 1-µF to 50-µF capacitor. In series with the load capacitor, add an ESR of 1-Ω for the best noise performance.
  • A high-frequency, 1-µF capacitor can be added in parallel between the output and ground to filter noise and help with switching loads as data converters.

10.2 Layout Example

REF5025-HT layout_example_2_bos471.gif Figure 37. Recommended Layout for REF5025-HT

10.3 Power Dissipation

The REF50xx family is specified to deliver current loads of ±10-mA over the specified input voltage range. The temperature of the device increases according to Equation 3:

Equation 3. TJ = TA + PD × RθJA

where

  • TJ = Junction temperature (°C)
  • TA = Ambient temperature (°C)
  • PD = Power dissipated (W)
  • RθJA = Junction-to-ambient thermal resistance (°C/W)

The REF50xx junction temperature must not exceed the absolute maximum rating of +150°C.