SBOS747B May   2016  – August 2016 REF6125 , REF6130 , REF6133 , REF6141 , REF6145 , REF6150

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
      2.      Reference Droop comparison (1 LSB = 19.07 µV, With ADS8881 at 1 MSPS)
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Solder Heat Shift
    2. 8.2 Thermal Hysteresis
    3. 8.3 Reference Droop Measurements
    4. 8.4 1/f Noise Performance
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Integrated ADC Drive Buffer
      2. 9.3.2 Temperature Drift
      3. 9.3.3 Load Current
      4. 9.3.4 Stability
    4. 9.4 Device Functional Modes
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Results
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3 Reference Droop Measurements

Many applications, such as event-triggered and multiplexed data-acquisition systems, require the very first conversion of the ADC to have 18-bit or greater precision. These types of data-acquisition systems capture data in bursts, and are also called burst-mode, data-acquisition systems. Achieving 18-bit precision for the first sample is a very difficult using a conventional voltage reference because the voltage reference droop limits the accuracy of the first few conversions. The REF61xx have an integrated ADC drive buffer that makes sure the reference droop is less than 1 LSB at 18-bit precision when used with the ADS8881, even at full throughput. Figure 44 and Figure 45 show the REF61xx output voltage droop when driving the REF pin of the ADS8881 at positive and negative full-scale inputs, respectively.

REF6125 REF6130 REF6133 REF6141 REF6145 REF6150 C047_SBOS708.png
REF6150 driving REF pin of ADS8881 operating at 1 MSPS,
positive full-scale input to ADS8881
Figure 44. Output Voltage Droop
REF6125 REF6130 REF6133 REF6141 REF6145 REF6150 C048_SBOS708.png
REF6150 driving REF pin of ADS8881 operating at 1 MSPS,
negative full-scale input to ADS8881
Figure 45. Output Voltage Droop

Direct measurement of the reference droop to 18-bit accuracy can be a challenging process. Therefore, the plots in Figure 44 and Figure 45 were obtained by processing the output code of the ADC. The ADC output code is given by:

Equation 2. C = (Input Voltage / VREF) × 2N

If the input voltage is kept constant, VREF is computed by monitoring the ADC output code C. The ADC code usually has six to seven LSBs of code spread due to the inherent noise of the ADC. In order to measure reference droop, this noise must be reduced drastically. Noise reduction is done by averaging the output code multiple times, as described in the next paragraph.

Figure 46 shows the setup that was used to measure the reference droop. The output ADC code was captured using a field-programmable gate array (FPGA), and post-processing was done on a personal computer. The input to the THS4521, and hence in turn to the ADS8881, is a constant dc voltage (close to positive or negative full-scale because this condition is the worst-case for charge drawn from the REF pin). The dc source must have extremely low noise. After the REF61xx device is powered up and stable, the FPGA sends commands to the ADS8881 to capture data in bursts. The ADS8881 is initially in idle mode for 100 ms. The FPGA then sends a command to the ADS8881 to perform 100 conversions at 1 MSPS. The ADC code corresponding to these 100 conversions (one burst of data) is stored as the first row in a 1000 × 100 dimensional array. This operation is repeated 1000 times, and the data corresponding to each burst is stored in a new row of the 1000 × 100 dimensional array. Finally, each column in this array is averaged to get a final data-set of 100 elements. This final data-set now has code spread that is much less than 1 LSB because most of the noise has now been removed through averaging. This data-set was plotted on a graph with X axis = column number (each column number corresponds to 1 µs of time because the sampling rate is 1 MSPS), and Y axis = ADC output code to obtain reference-droop measurements.

REF6125 REF6130 REF6133 REF6141 REF6145 REF6150 REF61xx_TIPD_BOS747.gifFigure 46. Burst-Mode Measurement Setup