SNAS781G October   2020  – September 2023 REF70

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  REF7012 Electrical Characteristics
    6. 7.6  REF7025 Electrical Characteristics
    7. 7.7  REF7030 Electrical Characteristics
    8. 7.8  REF7033 Electrical Characteristics
    9. 7.9  REF7040 Electrical Characteristics
    10. 7.10 REF7050 Electrical Characteristics
    11. 7.11 Typical Characteristics
  9. Parameter Measurement Information
    1. 8.1 Solder Heat Shift
    2. 8.2 Long-Term Stability
    3. 8.3 Thermal Hysteresis
    4. 8.4 Noise Performance
      1. 8.4.1 1/f Noise
      2. 8.4.2 Broadband Noise
    5. 8.5 Temperature Drift
    6. 8.6 Power Dissipation
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 EN Pin
    4. 9.4 Device Functional Modes
      1. 9.4.1 Basic Connections
      2. 9.4.2 Negative Reference Voltage
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Application: Basic Voltage Reference Connection
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Input and Output Capacitors
            1. 10.2.1.2.1.1 Application Curve
          2. 10.2.1.2.2 Force and Sense Connection
      2. 10.2.2 Typical Application: DAC Force and Sense Reference Drive Circuit
        1. 10.2.2.1 Design Requirements
    3. 10.3 Power Supply Recommendation
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

Figure 10-7 and Figure 10-8 illustrate an example of a PCB layout for a data acquisition system using the REF70. Some key considerations are:
  • Connect low-ESR, 0.1-μF ceramic bypass capacitors at VIN of the REF70.
  • Connect low-ESR, 1-uF to 100-uF capacitor at OUTF of the REF70.
  • Decouple other active devices in the system per the device specifications.
  • Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
  • Place the external components as close to the device as possible. This configuration prevents parasitic errors (such as the Seebeck effect) from occurring.
  • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary.