SCAS516E June   1995  – March 2024 SN54ACT241 , SN74ACT241

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Switching Characteristics
    6. 4.6 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
        1. 7.2.1.1 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • W|20
  • J|20
  • FK|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

Device Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SNx4ACT241 N (PDIP, 20) 24.33mm × 9.4mm 24.33mm × 6.35mm
DW (SOIC, 20) 12.8mm × 10.3mm 12.8mm × 7.5mm
NS (SOP, 20) 12.6mm × 7.8mm 12.6mm × 5.3mm
DB (SSOP, 20) 7.2mm × 7.8mm 7.2mm × 5.3mm
PW (TSSOP, 20) 6.5mm × 6.4mm 6.5mm × 4.4mm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.

GUID-1B2E079C-D12E-479D-9A4E-D9F4DAB78B07-low.png
Logic Diagram (Positive Logic)