SCLS262N December   1995  – February 2024 SN54AHCT02 , SN74AHCT02

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Noise Characteristics
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 TTL-Compatible CMOS Inputs
      2. 7.3.2 Balanced CMOS Push-Pull Outputs
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

These devices contain four independent 2-input NOR gates that perform the Boolean function Y = A × B or Y = A + B in positive logic.

Device Information
PART NUMBER RATING PACKAGE SIZE(1)
SN54AHCT02 Military J (CDIP, 14)
W (CFP, 14)
FK (LCCC, 20)
SN74AHCT02 Commercial D (SOIC, 14)
DB (SSOP, 14)
DGV (TVSOP, 14)
N (PDIP, 14)
NS (SOP, 14)
PW (SOP, 14)
RGY (VQFN, 14)
BQA (WQFN, 14)
For more information, see Section 11.
GUID-5F1071DF-A1DE-4AD2-9DA6-3A07B49BFFF4-low.gif Logic Diagram (Positive Logic)