SCLS239N october   1995  – august 2023 SN54AHCT373 , SN74AHCT373

PRODMIX  

  1.   1
  2. 1Features
  3. 2Description
  4. 3Revision History
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements, VCC = 5 V ± 0.5 V
    7. 5.7 Switching Characteristics, VCC = 5 V ± 0.5 V
    8. 5.8 Noise Characteristics
    9. 5.9 Operating Characteristics
  7. 6Parameter Measurement Information
  8. 7Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • W|20
  • J|20
  • FK|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-20211101-SS0I-H99V-RKZ0-CSLVVQZQ3GLN-low.gifFigure 4-1 SN54AHCT373 J or W Package; SN74AHCT373 DB, DGV, DW, N, NS, or PW Package (Top View)
GUID-20230327-SS0I-0BCQ-LTS7-R6FCLSZTN7XT-low.pngFigure 4-2 SN54AHCT373 FK Package (Top View)
Table 4-1 Pin Functions
PIN I/O DESCRIPTION
NO. NAME
1 OE I Output Enable
2 1Q O 1Q Output
3 1D I 1D Input
4 2D I 2D Input
5 2Q O 2Q Output
6 3Q O 3Q Output
7 3D I 3D Input
8 4D I 4D Input
9 4Q O 4Q Output
10 GND Ground
11 LE I Latch Enable
12 5Q O 5Q Output
13 5D I 5D Input
14 6D I 6D Input
15 6Q O 6Q Output
16 7Q O 7Q Output
17 7D I 7D Input
18 8D I 8D Input
19 8Q O 8Q Output
20 VCC Power Pin