SCLS099I December   1982  – September 2024 SN54HC112 , SN74HC112

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions #GUID-2EBD0632-9121-4D73-88A3-4D53587EF83D/GUID-D459A9EC-CCFD-4DD4-8D23-57A07F876135
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Timing Requirements
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Power Supply Recommendations
    2. 8.2 Layout
      1. 8.2.1 Layout Guidelines
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • W|16
  • J|16
  • FK|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.2 Recommended Operating Conditions(2)

SN54HC112 SN74HC112 UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 2 5 6 2 5 6 V
VIH High-level input voltage VCC = 2V 1.5 1.5 V
VCC = 4.5V 3.15 3.15
VCC = 6V 4.2 4.2
VIL Low-level input voltage VCC = 2V 0.5 0.5 V
VCC = 4.5V 1.35 1.35
VCC = 6V 1.8 1.8
VI Input voltage 0 VCC 0 VCC V
VO Output voltage 0 VCC 0 VCC V
tt(1) Input transition (rise and fall) time VCC = 2V 1000 1000 ns
VCC = 4.5V 500 500
VCC = 6V 400 400
TA Operating free-air temperature −55 125 −40 85 °C
(1) If this device is used in the threshold region (from VILmax = 0.5V to VIHmin = 1.5V), there is a potential to go into the wrong state from induced grounding, causing double clocking. Operating with the inputs at tt = 1000ns and VCC = 2V does not damage the device; however, functionally, the CLK inputs are not ensured while in the shift, count, or toggle operating modes.
(2) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.