SCLS103F March   1984  – April 2021 SN54HC126 , SN74HC126

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics - 74
    5. 6.5 Electrical Characteristics - 54
    6. 6.6 Switching Characteristics - 74
    7. 6.7 Switching Characteristics - 54
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Standard CMOS Inputs
      3. 8.3.3 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|14
  • FK|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

  • Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tt < 6 ns.
  • The outputs are measured one at a time, with one input transition per measurement.
GUID-FF6C9F07-9CF9-497D-8C15-311DBB591ACF-low.gif
CL= 50 pF and includes probe and jig capacitance.
Figure 7-1 Load Circuit
GUID-CA00234C-15C1-4292-BB9D-4FF0E5DA481A-low.gif
The maximum between tPLH and tPHL is used for tpd.
Figure 7-3 Voltage Waveforms Propagation Delays
GUID-38204D79-8ABA-402E-A2B7-553109AC2FA7-low.gif
tt is the greater of tr and tf.
Figure 7-2 Voltage Waveforms Transition Times