SCLS107G December   1982  – October 2021 SN54HC138 , SN74HC138

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings: SN74HC138
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: SN74HC138
    5. 6.5  Thermal Information: SN54HC138
    6. 6.6  Electrical Characteristics
    7. 6.7  Electrical Characteristics: SN74HC138
    8. 6.8  Electrical Characteristics: SN54HC138
    9. 6.9  Switching Characteristics
    10. 6.10 Switching Characteristics: SN74HC138
    11. 6.11 Switching Characteristics: SN54HC138
    12. 6.12 Typical Characteristic
  7. 7 Parameter Measurement Information
    1.     21
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • W|16
  • J|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3 Feature Description

This device features three binary inputs to select a single active-low output. Three enable pins are also available to enable or disable the outputs. One active high enable and two active low enable pins are available, and any enable pin can be deactivated to force all outputs high. All three enable pins must be active for the output to be enabled.