SCLS116H December 1982 – December 2015 SN54HC165 , SN74HC165
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | D, DB, N, NS, PW, J or W | FK | ||
A | 11 | 14 | I | Parallel Input |
B | 12 | 15 | I | Parallel Input |
C | 13 | 17 | I | Parallel Input |
CLK | 2 | 3 | I | Clock input |
CLK INH | 15 | 19 | I | Clock Inhibit, when High No change in output |
D | 14 | 18 | I | Parallel Input |
E | 3 | 4 | I | Parallel Input |
F | 4 | 5 | I | Parallel Input |
G | 5 | 7 | I | Parallel Input |
GND | 8 | 10 | — | Ground Pin |
H | 6 | 8 | I | Parallel Input |
NC | — | 1 | — | Not Connected |
6 | ||||
11 | ||||
16 | ||||
QH | 9 | 12 | O | Serial Output |
QH | 7 | 9 | O | Complementary Serial Output |
SER | 10 | 13 | I | Serial Input |
SH/LD | 1 | 2 | I | Shift or Load input, When High Data, shifted. When Low data is loaded from parallel inputs |
VCC | 16 | 20 | — | Power Pin |